US4810662A
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Method of fabricating a Si/SiC amorphous heterojunction photo transistor
Assignee: National Science and Technology Council
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Filing: 1987-09-16
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Granted: 1989-03-07
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Expires: 2007-09-16
Abstract
Abstract A heterojunction amorphous SiC/S i phototransistor with the structure of Al/n + a-SiC/i a-SiC/p + a-SiC/i a-Si/n + a-SiC is provided. This new device has a very thin a-SiC base (100Å) and a-SiC emitter, which provides an effective barrier to accumulate more photo generated holes at the base and therefore improves the gain significantly. An optical gain of 40 was obtained at an incident power of 5 μw. This device has very promising applications as a flat panel display transistor, a phototransistor in photosensing element/array, and photo coupler to replace the p-i-n photodiode.
Inventors
- 👤 Chun-Yen Chang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 19:35
CPC Classifications
H; H10; H10F; H10F30/00; H10F30/20; H10F30/21; H10F30/24; H10F30/245; H10F71/00; H10F71/10; H10F71/103; H10F71/1035; Y; Y02; Y02E; Y02E10/00; Y02E10/50
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
145 words
A method of fabricating a Si/SIC amorphous heterojunction phototransistor, by plasma enhanced chemical vapor deposition, comprising: cleaning a substrate selected from the group consisting of an ITO coated glass plate and an ITO coated insulator, with a sheet resistance of about 50 Ω/□; heating said substance to a temperature of about 250° C. for about 60 minutes and depositing the following layers by plasma enhanced chemical vapor deposition; depositing an n-type a-SiC:H layer about 100 Å thick on said substrate; depositing a first undoped a-Si:H layer having a thickness of between about 2000 and 7000 Å on said n-type a-SiC:H layer; depositing a p-type a-SiC:H base layer of about 100 Å thick on said first undoped layer; depositing a second undoped a-SiC:H layer about 160 Å thick on said base layer; and depositing an n-type a-SiC:H layer about 300 Å thick on said undoped layer.
Claim 2
Independent Claim
145 words
A method of fabricating a Si/SIC amorphous heterojunction phototransistor, by plasma enhanced chemical vapor deposition, comprising: cleaning a substrate selected from the group consisting of an ITO coated glass plate and an ITO coated insulator, with a sheet resistance of about 50 Ω/□; heating said substance to a temperature of about 250° C. for about 60 minutes and depositing the following layers by plasma enhanced chemical vapor deposition; depositing an n-type a-SiC:H layer about 100 Å thick on said substrate; depositing a first undoped a-Si:H layer having a thickness of between about 2000 and 7000 Å on said n-type a-SiC:H layer; depositing a p-type a-SiC:H base layer of about 100 Å thick on said first undoped layer; depositing a second undoped a-SiC:H layer about 160 Å thick on said base layer; and depositing an n-type a-SiC:H layer about 300 Å thick on said undoped layer.
Claim 3
Dependent Claim
43 words
The method of fabricating a Si/SiC amorphous heterojunction phototransistor set forth in claim 1, wherein in said plasma enhanced chemical vapor deposition a SiH 4 (0.45 parts by volume)+CH 4 (0.55 parts by volume) gas mixture is employed to grow said a-SiC:H layer.
Claim 4
Dependent Claim
41 words
The method of fabricating a Si/SiC amorphous heterojunction phototransistor set forth in claim 1, wherein in said plasma enhanced chemical vapor deposition a gas mixture comprising 75% by volume hydrogen and 25% by volume silane gas is used for a-Si:H deposition.
Claim 5
Dependent Claim
25 words
The method of fabricating a Si/SiC amorphous heterojunction phototransistor set forth in claim 4, wherein the R.F. power is about 40 watts during a-Si:H deposition.
Claim 6
Dependent Claim
29 words
The method of fabricating a Si/SiC amorphous heterojunction phototransistor set forth in claim 1, wherein in said plasma enhanced chemical vapor deposition the chamber pressure is about 1 torr.
Claim 7
Dependent Claim
154 words
The method of fabricating a Si/SiC amorphous heterojunction phototransistor set forth in claim 1, wherein said ITO coated substrate has a resistance of 50 Ω/□, before said plasma enhanced chemical vapor deposition said substrate is heated to a temperature of about 250° for about 60 minutes, said base layer has a thickness of about 100 Å, said second undoped layer has a thickness of about 160 Å, said emitter layer is about 300 Å thick, in said plasma enhanced chemical vapor deposition a SiH 4 (0.45 parts by volume)+CH 4 (0.55 parts by volume) gas mixture is employed to grow said a-SiC:H film, in said plasma enhanced chemical vapor deposition a gas mixture comprising 75% by volume hydrogen and 25% by volume silane gas is used for a-Si:H deposition, the R.F. power is about 40 watts during a-Si:H deposition, and in said plasma enhanced chemical vapor deposition the chamber pressure is about 1 torr.
References Cited (Backward Citations)
JPS58139464A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1992-03-06 | 1992-09-05 | 1993-03-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-03-06 | 1996-09-05 | 1997-03-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-03-06 | 2000-09-05 | 2001-03-07 | $7700.00 | Window Closed / Lapsed |