Dual limit programmable linear signal limiter
Abstract
Abstract A current signal limiter provides precise minimum and maximum current limiting. Both maximum and minimum current limits are easily programmable. The signal limiter operates at maximum frequency response without inversion of the input signal. Current signal limiting is achieved by an NPN transistor biased in a common base configuration with the base coupled to a reference voltage source and the collector providing the output current, a series diode coupled to the emitter of the transistor for receiving a trickle current which prevents the transistor from turning off as well as setting a minimum current limit, and a diode matrix for receiving two reference currents and an input current. The diode matrix steers the input and reference currents to the transistor or to the reference voltage source, depending on the magnitude of the input and reference currents. The minimum and maximum current limits are programmable by adjusting the values of the reference currents and the trickle current.
Inventors
- 👤 John F. Stoops
Bibliographic Details
Claims Analysis
Total Claims: 4References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-28 | 1992-08-29 | 1993-02-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-28 | 1996-08-29 | 1997-02-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-28 | 2000-08-29 | 2001-02-28 | $7700.00 | Window Closed / Lapsed |