Apparatus for the regeneration of channel-clock information in synchronous data transmission and data-recovery circuit arrangement comprising such apparatus

Claim 1

Apparatus for the regeneration of channel-clock information from a series of samples which represnt the signal values of a band-limited transmission signal at equidistant sampling instants, which transmission signal is synchronous with the channel clock, comprising: a. computing means for derving initial position sof the successive sampling instants relative to reference instants defined by variable reference phase positions of a virtual reference clock, the initial position of each sampling instant being determined from the initial positions of the prior sampling instants; b. detection means for detecting, from the signal values of samples at the sampling instants, crossing of a detection level by the transmission signal between successive sampling instants; c. interpolation means coupled to said detection means and responsive to level-crossings detected thereby for determining second positions of the successive sampling instants relative to such level crossings from the signal values of samples in the proximity of such level crossings; d. means for comparing the initial and second sampling positions of said sampling instants with each other and deriving the difference there-between; and e. means for correcting the time difference between the period of the virtual reference clock and the signal sampling interval in accordance with the differences between the initial and second sampling positions determined by said comparing means; said computing means being adapted to derive the initial positions of the sampling instants in accordance with said corrected time difference.

Claim 5

A device for regeneration of channel-clock information from a series of samples which represent signal values of a band-limited transmission signal (Vt) at equidistant sampling instants, which transmission signal (Vt) is synchronous with the channel clock, comprising: (a) means (5) for determining, according to an input value (Q), reference phase positions (R) indicative of phase positions of the sampling instants with respect to a phase of a virtual clock (C ref ), the input value (Q) corresponding to a difference between two successive reference phase positions (R), (b) detection means (10, 14, 17) for detecting crossings of a detection level by the transmission signal (Vt) from the samples (J), (c) interpolation means (12) responsive to crossings of the detection level for determining phase positions (N) of the sampling instants with respect to the phase of the channel clock from the samples (J), (d) means for determining a difference (P) between the phase positions (N) and the corresponding reference phase positions (R), whereby the difference (P) represents a phase difference between a detection level crossing and the phase of the virtual clock, (e) means (4) for adapting the input value (Q) according to the differences (P), so that the differences between the phase positions (N) and the corresponding reference phase positions (R) are substantially kept at a constant value, whereby, if the sampling frequency assumes values that are not precisely double the channel clock frequency, the channel clock information is still recovered.

Claim 6

A device for regeneration of channel-clock information from a series of samples which represent signal values of a band-limited transmission signal (Vt) at equidistant sampling instants, which transmission signal (Vt) is synchronous with the channel clock, comprising: (a) means (5) for determining, according to an input value (Q), reference phase positions (R) indicative of phase positions of the sampling instants with respect to a phase of a virtual clock (C ref ), the input value (Q) corresponding to a difference between two successive reference phase positions (R), (b) detection means (10, 14, 17) for detecting crossings of a detection level by the transmission signal (Vt) from the samples (J), (c) interpolation means (12) responsive to crossings of the detection level for determining phase positions (N) of the sampling instants with respect to the phase of the channel clock from the samples (J), (d) means for determining a difference (P) between the phase positions (N) and the corresponding reference phase positions (R), whereby the difference (P) represents a phase difference between a detection level crossing and the phase of the virtual clock, (e) means (4) for adapting the input value (Q) according to the differences (P), so that the differences between the phase positions (N) and the corresponding reference phase positions (R) are substantially kept at a constant value, whereby, if the sampling frequency assumes values that are not precisely double the channel clock frequency, the channel clock information is still recovered.

Claim 9

A device as claimed in calim 6, wherein the means (5) for determining the reference phase positions (R) comprises comparing means (42) for determining a second difference between a first determined reference phase position (R(k)) and a value (T) corresponding to the sampling interval, the means (5) for determining the reference phase position (R) being adapted to determine a next phase position (R(k+1)) by modifying it by the input value (Q) or a value (-T), corresponding to the sampling interval with a sign opposite to a sign of the input value (Q), according to whether the second difference determined by the said comparing means (42) is negative or positive, respectively.

Claim 14

A device for synchronizing a receiver with a channel clock having a phase and a channel clock frequency, with which channel clock a received band-limited signal (Vt) is synchronized, comprising: a. an input for receiving a series of samples (J) which represent the received signal (Vt) at equidistant sampling instants, the sampling instants having a sampling frequency; b. means, responsive to an input value (Q), for determining reference phase positions (R) indicative of phase positions of the sampling instants with respect to a phase of a virtual clock (C ref ), the input value (Q) corresponding to a difference between two successive values of the reference phase positions (R); c. means (10, 14, 17), responsive to the samples (J), for detecting crossings of a detection level by the received signal (Vt); d. means (12), responsive to the crossings of the detection level and to the samples (J), for interpolating phase positions (N) of the sampling instants with respect to the phase of the channel clock; e. means for determing differences (P) between the phase positions (N) and the corresponding reference phase positions (R), whereby each difference (P) also represents a phase difference between a detection level crossing and the phase of the virtual clock; and f. means (4) for adapting the input value (Q) according to the differences (P), so that the differences (P) are kept at a substantially constant value, whereby the reference phase positions (R): represent a synchronization between the channel clock and the virtual clock; and, in conjunction, with the signal samples (J) allow recovery of data from the received signal (Vt), and whereby if the sampling frequency assumes values which are not precisely double the channel clock frequency, synchronization is still achieved.

Claim 15

A device for synchronizing a receiver with a channel clock having a phase and a channel clock frequency, with which channel clock a received band-limited signal (Vt) is synchronized, comprising: a. an input for receiving a series of samples (J) which represent the received signal (Vt) at equidistant sampling instants, the sampling instants having a sampling frequency; b. means, responsive to an input value (Q), for determining reference phase positions (R) indicative of phase positions of the sampling instants with respect to a phase of a virtual clock (C ref ), the input value (Q) corresponding to a difference between two successive values of the reference phase positions (R); c. means (10, 14, 17), responsive to the samples (J), for detecting crossings of a detection level by the received signal (Vt); d. means (12), responsive to the crossings of the detection level and to the samples (J), for interpolating phase positions (N) of the sampling instants with respect to the phase of the channel clock; e. means for determing differences (P) between the phase positions (N) and the corresponding reference phase positions (R), whereby each difference (P) also represents a phase difference between a detection level crossing and the phase of the virtual clock; and f. means (4) for adapting the input value (Q) according to the differences (P), so that the differences (P) are kept at a substantially constant value, whereby the reference phase positions (R): represent a synchronization between the channel clock and the virtual clock; and, in conjunction, with the signal samples (J) allow recovery of data from the received signal (Vt), and whereby if the sampling frequency assumes values which are not precisely double the channel clock frequency, synchronization is still achieved.