Redundant conductor structures for thin film FET driven liquid crystal displays

Claim 2

A liquid crystal display comprising: a pair of flat substrates, at least one of which is transparent; a quantity of liquid crystal material disposed and contained between said substrates; an array of pixel electrodes disposed on at least one of said substrates; at least one ground plane electrode disposed on the other one of said substrates, so that liquid crystal material is disposed between said pixel electrodes and any of said ground plane electrodes, with at least one of said ground electrodes and said array of pixel electrodes being transparent; an array of thin film field effect transistor switch elements associated with said pixel electrodes; a set of electrically conductive data lines, said data lines having a multilayer structure including an insulative layer, said multilayer structure extending for at least a portion of the length of said data lines, with at least two of these layers comprising conductive material disposed above and below said insulative layer and in electrical contact along a portion of the length of said data lines; and a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected so as to permit voltages appearing on said data lines to be applied to select pixel electrodes in accordance with signals present on said gate lines, said gate lines and said data lines being insulated from one another by means of said insulative layer in said multilayer data lines, said multilayer insulative layer extending across said gate lines so that data line conductors cross said gate lines without traversing substantially vertical step discontinuities.

Claim 3

The display of claim 1 in which said switch elements include a gate metal layer, a gate insulating layer and distinct source and drain patterns in a metal layer overlying said gate insulation layer.

Claim 4

The display of claim 2 in which said multilayer structure includes three layers.

Claim 5

The display of claim 3 in which said data lines include a first, conductive layer disposed in the same layer as said gate metal.

Claim 6

The display of claim 4 in which said first data line layer includes gaps through which said gate lines pass.

Claim 7

The display of claim 5 in which said data lines include a second, insulating layer disposed in the same layer as said gate insulation.

Claim 8

The display of claim 1 in which said data lines include a third, substantially continuous, conductive layer disposed over said insulating layer.

Claim 9

The display of claim 6 in which said data lines include a third, substantially continuous, conductive layer disposed in the same layer as said source and drain metal patterns.

Claim 10

The display of claim 1 in which said electrical contact is made on either side of said insulation layer.

Claim 11

The display of claim 1 in which said gate lines include first and second conductive layers.

Claim 12

The display of claim 2 in which said gate lines comprise conductive material in said first layer thereof lying in the same layer as said gate metal with said second layer conductive material applied in the same layer as said source and drain patterns.

Claim 13

The display of claim 11 in which said second layer of said gate lines include gaps through which said data lines pass.

Claim 14

The display of claim 11 in which said first layer of said gate lines is substantially continuous.

Claim 15

The display of claim 1 in which said electrically conductive gate lines, said switch elements, and said data lines are electrically connected so as to reverse the roles of said gate lines and said data lines with respect to their extending in horizontal and vertical directions.

Claim 16

The display of claim 1 in which said switch elements comprise amorphous silicon field effect transistors.

Claim 17

A liquid crystal display comprising: a pair of flat substrates, at least one of which is transparent; a quantity of liquid crystal material disposed and contained between said substrates; an array of pixel electrodes disposed on said at least one substrate; at least one ground plane electrode disposed on the other of said substrates, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrode said ground plane electrode and said array of pixel electrodes being transparent; an array of thin film field effect transistor switch elements associated with said pixel electrodes, said transistor switch elements including source and drain electrodes with at least one of said electrodes exhibiting multiple finger projections; a set of electrically conductive data lines said data lines having a multilayer structure including an insulative layer, said multilayer structure extending for at least a portion of the length of said data lines; and a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected to permit voltages appearing on said data lines to be applied to said pixel electrodes in accordance signals present on said gate lines said gate lines and said data lines being insulated from one another by means of said insulative layer, said insulative layer extending across said gate lines so that said data lines cross said gate lines without transversing substantially vertical step discontinuities.

Claim 18

A liquid crystal display comprising: a pair of flat substrates, at least one of which is transparent; a quantity of liquid crystal material disposed and contained between said substrates; an array of pixel electrodes disposed on said at least one substrate; at least one ground plane electrode disposed on the other of said substrates, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrode said ground plane electrode and said array of pixel electrodes being transparent; an array of thin film field effect transistor switch elements associated with said pixel electrodes, said transistor switch elements including source and drain electrodes with at least one of said electrodes exhibiting multiple finger projections; a set of electrically conductive data lines said data lines having a multilayer structure including an insulative layer, said multilayer structure extending for at least a portion of the length of said data lines; and a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected to permit voltages appearing on said data lines to be applied to said pixel electrodes in accordance signals present on said gate lines said gate lines and said data lines being insulated from one another by means of said insulative layer, said insulative layer extending across said gate lines so that said data lines cross said gate lines without transversing substantially vertical step discontinuities.

Claim 19

The display of claim 16 in which said thin film field effect transistor switch elements include amorphous silicon transistors.

Claim 20

A liquid crystal display comprising: a pair of flat substrates, at least one of which is transparent; a quantity of liquid crystal material disposed and contained between said substrates; an array of pixel electrodes disposed on at least one of said substrate; at least one ground plane electrode disposed on the other one of said substrates, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrodes, with at least one of said ground plane electrodes and said array of pixel electrodes being transparent; an array of thin film field effect transistor switch elements associated with said pixel electrodes, said transistor switch elements having source and drain electrodes with at least one of said electrodes exhibiting multiple projections; a set of electrically conductive data lines, said data lines having a multilayer structure including an insulative layer, said multilayer structure extending for at least a portion of the length of said data lines with at least two of said layers comprising conductive material in electrical contact along a portion of the lengths of said data lines; and a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected so as to permit voltages appearing on said data lines to be applied to select pixel electrodes in accordance with signals present on said gate lines, said gate lines and said data lines being insulated from one another by means of said insulative layer in said multilayer data lines, said multilayer insulative layer extending across said gate lines so that data line conductors cross said gate lines without traversing substantially vertical step discontinuities.

Claim 21

A liquid crystal display comprising: a pair of flat substrates, at least one of which is transparent; a quantity of liquid crystal material disposed and contained between said substrates; an array of pixel electrodes disposed on at least one of said substrate; at least one ground plane electrode disposed on the other one of said substrates, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrodes, with at least one of said ground plane electrodes and said array of pixel electrodes being transparent; an array of thin film field effect transistor switch elements associated with said pixel electrodes, said transistor switch elements having source and drain electrodes with at least one of said electrodes exhibiting multiple projections; a set of electrically conductive data lines, said data lines having a multilayer structure including an insulative layer, said multilayer structure extending for at least a portion of the length of said data lines with at least two of said layers comprising conductive material in electrical contact along a portion of the lengths of said data lines; and a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected so as to permit voltages appearing on said data lines to be applied to select pixel electrodes in accordance with signals present on said gate lines, said gate lines and said data lines being insulated from one another by means of said insulative layer in said multilayer data lines, said multilayer insulative layer extending across said gate lines so that data line conductors cross said gate lines without traversing substantially vertical step discontinuities.

Claim 22

The display of claim 18 in which said switch elements include a gate metal layer, a gate insulation layer and distinct source and drain patterns in a metal layer overlying said gate insulation layer.

Claim 23

The display of claim 1 in which said multilayer structure includes three layers.

Claim 24

The display of claim 20 in which said data lines include a first, conductive layer disposed in the same layer as said gate metal.

Claim 25

The display of claim 21 in which said first data line layer includes gaps through which said gate lines pass.

Claim 26

The display of claim 22 in which said data lines include a second, insulative layer disposed in the same layer as said gate insulation.

Claim 27

The display of claim 23 in which said second insulative layer extends across said gate lines, whereby additional data line conductor lines cross said gate lines without traversing vertical step jumps.

Claim 28

The display of claim 24 in which daid data lines include a third, substantially continuous, conductive layer disposed over said second, insulative layer.

Claim 29

The display of claim 24 in which said data lines include a third, substantially continuous, conductive layer disposed in the same layer as said source and drain metal patterns.

Claim 30

The display of claim 24 in which said data lines include a third, substantially continuous, conductive layer in contact with said first, conductive layer.

Claim 31

The display of claim 27 in which said contact is made on either side of said insulation layer.

Claim 32

The display of claim 18 in which said gate lines include first and second conductive layers.

Claim 33

The display of claim 29 in which said gate lines comprise conductive material in said first layer thereof lying in the same layer as said gate metal with said second layer conductive material applied in the same layer as said source and drain patterns.

Claim 34

The display of claim 30 in which said second layer of said gate lines includes gaps through which said data lines pass.

Claim 35

The display of claim 30 in which said first layer of said gate lines is substantially continuous.

Claim 36

The display of claim 18 in which said electrically conductive gate lines, said switch elements and said data lines are electrically connected so as to reverse the roles of said gate lines and said data lines with respect to their extending in horizontal and vertical directions.

Claim 37

The display of claim 18 in which said switch elements comprise amorphous silicon field effect transistors.