US4803709A
Expired / Lapsed
US
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Elimination of KTC noise in a charge coupled device
Assignee: Mitsubishi Electric Corp
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Filing: 1987-07-27
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Granted: 1989-02-07
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Expires: 2007-07-27
Abstract
Abstract An output circuit of a charge coupled device comprises a transistor (4, 5, 6) having a floating diffusion (5) provided to receive a series of signal charges from a charge transfer section. Each signal charge is transferred to the floating diffusion in synchronism with a drive clock applied to the charge transfer section. The transistor has a gate electrode (4) connected to receive a reset clock (φR') applied at an interval longer than the period of the drive clock.
Inventors
- 👤 Masafumi Kimata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:00
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/28; G11C19/282; G11C19/285
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
85 words
An output circuit of a charge coupled device comprising a first transistor having a floating diffusion provided to receive a series of signal charges from a charge transfer section, each signal charge being transferred to the floating diffusion in synchronism with a drive clock applied to the charge transfer section, the first transistor having a gate electrode connected to receive a reset clock (φR'), and interval means for causing the reset clock (oR') to have an interval longer than the period of the drive clock.
Claim 2
Dependent Claim
85 words
An output circuit of a charge coupled device comprising a first transistor having a floating diffusion provided to receive a series of signal charges from a charge transfer section, each signal charge being transferred to the floating diffusion in synchronism with a drive clock applied to the charge transfer section, the first transistor having a gate electrode connected to receive a reset clock (φR'), and interval means for causing the reset clock (oR') to have an interval longer than the period of the drive clock.
Claim 3
Dependent Claim
33 words
A circuit according to claim 1, wherein the interval means is operable to cause the interval of application of the reset clock to be a multiple of the period of the drive clock.
Claim 4
Dependent Claim
35 words
A circuit according to claim 1, wherein the interval means is operable to vary the interval of application of the reset clock depending on the amount of the signal charges transferred to the floating diffusion.
Claim 5
Dependent Claim
26 words
A circuit according to claim 3, wherein the interval of the reset clock is made longer as the amount of the transferred signal charges is smaller.
Claim 6
Dependent Claim
27 words
A circuit according to claim 3, wherein the reset clock is applied to the gate electrode when the potential at the floating diffusion reaches a predetermined level.
Claim 7
Dependent Claim
36 words
A circuit according to claim 1, further comprising a second transistor having a gate electrode connected to the floating diffusion, and an output terminal for producing a potential corresponding to the potential of the floating diffusion.
Claim 8
Dependent Claim
49 words
A circuit according to claim 6, wherein the second transistor has a drain connected to a first power supply (Vo) and has a source connected through a resistor to a second power supply (GND) to form a source-follower circuit, the source of the second transistor constituting the output terminal.
Claim 9
Dependent Claim
29 words
A circuit according to claim 6, wherein the interval means further comprises means responsive to the potential at the output terminal for varying the interval of the reset clock.
Claim 10
Dependent Claim
36 words
A circuit according to claim 8, wherein said means responsive to the potential determines an average of a number of signal charges being transferred in succession, and makes the interval longer as the average is smaller.
Claim 11
Dependent Claim
33 words
A circuit according to claim 6, further comprising means responsive to the potential at the output terminal for producing the reset clock when the potential at the floating diffusion reaches a predetermined level.
Claim 12
Dependent Claim
17 words
A circuit according to claim 6, further comprising means for sampling the potential on the output terminal.
Claim 13
Dependent Claim
32 words
A circuit according to claim 11, wherein the sampling means carries out the sampling at the period of the drive clock, each time the signal charge is transferred to the floating diffusion.
Claim 14
Dependent Claim
51 words
A circuit according to claim 11, wherein the sampling means carries out the sampling at the interval of the reset clock, after the last transfer within the interval of the signal charge to the floating diffusion and before the application of the reset clock at the end of the said interval.
Claim 15
Dependent Claim
32 words
A circuit according to claim 6, wherein the floating diffusion constitutes the source of the first transistor and the first transistor further has a drain connected to a reset power supply (VR).
Claim 16
Dependent Claim
32 words
A circuit according to claim 1, wherein the floating diffusion constitutes the source of the first transistor and the first transistor further comprises a drain connected to a reset power supply (VR).
Claim 17
Dependent Claim
32 words
A circuit according to claim 11, further comprising means for determining the difference between two successive sample values from the sampling means to determine the signal charge transferred to the floating diffusion.
Claim 18
Dependent Claim
79 words
A charge coupled device comprising a charge coupled transfer section transferring signal charges in synchronism with a drive clock applied thereto, a first transistor having a floating diffusion, the signal charges being transferred in succession to the floating diffusion in synchronism with the drive clock, and the first transistor having a gate electrode connected to receive a reset clock (φR'), and means for causing the reset clock to have an interval longer than the period of the drive clock.
Claim 19
Dependent Claim
79 words
A charge coupled device comprising a charge coupled transfer section transferring signal charges in synchronism with a drive clock applied thereto, a first transistor having a floating diffusion, the signal charges being transferred in succession to the floating diffusion in synchronism with the drive clock, and the first transistor having a gate electrode connected to receive a reset clock (φR'), and means for causing the reset clock to have an interval longer than the period of the drive clock.
References Cited (Backward Citations)
US3781574A
Cited
US4309624A
Cited
US4454435A
Cited
US4554675A
Cited
US4499497A
Cited
US4556851A
Cited
US4567525A
Cited
US4698686A
Cited
US4608606A
Cited
US4683580A
Cited
US4661788A
Cited
US4716317A
Cited
US4689808A
Cited
US4644287A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-07 | 1992-08-08 | 1993-02-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-07 | 1996-08-08 | 1997-02-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-07 | 2000-08-08 | 2001-02-07 | $7700.00 | Window Closed / Lapsed |