Encryption printed circuit board

Claim 1

An encryption/decryption apparatus for a host computer having expansion slots for an expander board comprising: an expander board for connection to a host computer's expansion slot, said expander board including: an address storage means, a control read/write means, and a data storage means for operative connection to a host computer, the address means for storing addresses for a block of data received from the host computer for ciphering and the read/write control means for receiving ciphering operational commands from the host computer including memory read, I/O read, I/O write, and enable control signals; an auto-start means connected to the address storage means, control read/write means, and data storage means for coordinating the data addresses of the host computer with addresses for the expander board; a register selector means connected to the auto-start memory means and to the control read/write means for outputting register selector signals; a register means including a data input register connected to the control read/write means and data storage means and responsive to an I/O read enabling signal for storing the host computer's data for ciphering, a read/write command status register connected to the control read/write means and responsive to an I/O write signal for storing the host computer's command status signals, and a data output register connected to a microprocessor's enable terminal and data storage means and responsive to an enable signal for reveiving ciphered data; a cipher processor connected to the register means for receiving data for encryption or decryption selectively; a microprocessor connected to the register means and to the cipher processor, the micropressor including an instruction means, and an instruction execution means for cycling through an I/O port read bus cycle, a memory-read bus cycle; a data storage means connected to the cipher processor and to the microprocessor for storing the ciphered data output of the cipher processor; and a key card interface means connected to the microprocessor, the key card interface means for connection to a key card reader for obtaining key information for the cipher processor; whereby the microprocessor upon command of the host processor fetches key information from the key card interface means for user authentication and cipher processor code selection and responsive to an authentication signal cycling through an I/O port read bus cycle each time an IN instruction is executed, a memory-read bus cycle for fetching instructions and data for ciphering by the cipher processor, and I/O port write bus cycle each time an OUT instruction is executed for writing data to a specific I/O port address in the I/O address space of the microprocessor storage means, and a memory-write bus cycle each time an instruction is executed to write data to a valid memory location.