Receiver having an interface with a sub-system

Claim 2

A receiver having an interface arrangement for connection between said receiver and a conditional access sub-system and comprising a bus having a first line for conveying clock signals at television line frequency rate from said receiver to said sub-system, a second line for conveying data with a bit rate corresponding to that of the clock signal from said receiver to said sub-system during a first part of a bus cycle period and from said sub-system to said receiver during the remaining part of said bus cycle period, and a third line for conveying a direction signal indicating to said sub-system the direction of data travel on said second line, the bus cycle period having a duration equal to four television frame periods, the data on said second line during the first part of each bus cycle period including: i. an address block containing the unique address of the sub-system with which said receiver is in communication, ii. a status block providing status information for individual following blocks in the first part of the bus cycle period, iii. a plurality of data blocks each of equal length and each conveying entitlement sessages, and iv. a further block having either a first or a second greater duration which provides information relating to a frame count, said status block in the case of said data blocks of equal length indicating the type of entitlement message being conveyed in each such block while in the case of said further block said status block indicates the duration of the said further block.

Claim 3

A receiver as claimed in claim 1, in which said further block when of said first duration conveys the least significant bits of said frame count.

Claim 4

A receiver as claimed in claim 1, in which the data on the said second line during the first part of each bus cycle period additionally includes a keying block which conveys keyboard or remote control commands, the status block in the case of the keying block indicating the validity of the keying block.

Claim 5

A receiver having an interface arrangement for connection between said receiver and a conditional access sub-system and comprising a bus having a first line for conveying clock signals at television line frequency rate from said receiver to said sub-system, a second line for conveying data with a bit rate corresponding to that of the clock signal and with 8 bits per byte from said receiver to said sub-system during a first part of a bus cycle period and from said sub-system to said receiver during the remaining part of said bus cycle period, and a third line for conveying a direction signal indicating to said sub-system the direction of data travel on said second line, the bus cycle period having a duration equal to four television frame periods, the data on said second line during the first part of each bus cycle period including sequentially: i. an address block of 1 byte containing the unique address of the sub-system with which said receiver is in communication, ii. a status block of 1 byte providing status information for the following and remaining individual blocks in the first part of the bus cycle period, iii. three data blocks each of 93 bytes and each containing an entitlement message, iv. a keying block of 1 byte conveying keyboard or remote control commands, and v. a further block of either 1/2 byte or 21/2 bytes conveying either the least significant bits of the frame count (4 bits) or the 256-frame count (20 bits), while the data on said second line during the second part of each bus cycle period comprises a data block of either 30 or 28 bytes, depending on the length of said further block, comprising information for said receiver from said sub-system.

Claim 6

A receiver having an interface arrangement for connection between said receiver and a conditional access sub-system and comprising a bus having a first line for conveying clock signals at television line frequency rate from said receiver to said sub-system, a second line for conveying data with a bit rate corresponding to that of the clock signal and with 8 bits per byte from said receiver to said sub-system during a first part of a bus cycle period and from said sub-system to said receiver during the remaining part of said bus cycle period, and a third line for conveying a direction signal indicating to said sub-system the direction of data travel on said second line, the bus cycle period having a duration equal to four television frame periods, the data on said second line during the first part of each bus cycle period including sequentially: i. an address block of 1 byte containing the unique address of the sub-system with which said receiver is in communication, ii. a status block of 1 byte providing status information for the following and remaining individual blocks in the first part of the bus cycle period, iii. three data blocks each of 93 bytes and each containing an entitlement message, iv. a keying block of 1 byte conveying keyboard or remote control commands, and v. a further block of either 1/2 byte or 21/2 bytes conveying either the least significant bits of the frame count (4 bits) or the 256-frame count (20 bits), while the data on said second line during the second part of each bus cycle period comprises a data block of either 30 or 28 bytes, depending on the length of said further block, comprising information for said receiver from said sub-system.

Claim 7

A receiver as claimed in claim 4, in which the status block provides the following status information: i. the type of entitlement message in the case of the three 93 byte data blocks, ii. the validity of the keying block, and iii. the length and hence content of the said further block conveying frame count information.

Claim 8

A receiver as claimed in claim 2, in which the data on the said second line during the first part of each bus cycle period additionally includes a keying block which conveys keyboard or remote control commands, the status block in the case of the keying block indicating the validity of the keying block.