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US4796084A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having high resistance to electrostatic and electromagnetic induction using a complementary shield pattern

Assignee: Toshiba Corp
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Filing: 1986-05-12
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Granted: 1989-01-03
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Expires: 2006-05-12
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Abstract

Abstract A semiconductor device is disclosed with a conductive on-chip shield film formed on its surface. The on-chip shield film is patterned in a manner substantially complementary to the pattern of the wiring layer of the semiconductor device so that the shield film does not cover portions of the semiconductor device which are covered by the wiring-pattern layer. In this manner, the on-chip shield film of the semiconductor device provides high resistance to electrostatic and electromagnetic induction while maintaining the ability of the device to withstand changes in ambient temperature.

Inventors

  • 👤 Keiji Kamasaki
  • 👤 Tadao Dengo
  • 👤 Ikuo Fukuda
  • 👤 Hideaki Motojima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 13:54
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10F; H10F55/00; H10F77/00; H10F77/30; H10F77/306; H10F77/331; H10F77/334; H10W42/00; H10W42/20; H10W42/60; H10W70/00; H10W70/60; H10W72/50; H10W72/531; H10W72/536; H10W72/59; H10W72/931; H10W72/934; H10W72/951; H10W72/952; H10W72/981; H10W72/983

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 109 words
A semiconductor device having high resistance to electrostatic and electromagnetic induction comprising: a semiconductor element formed in a semiconductor substrate; a first insulating film formed on a surface of said semiconductor substrate; a wiring-pattern layer formed on said first insulating film, said wiring-pattern layer contacting said semiconductor substrate through at least one contact hole formed in said first insulating film; a second insulating film formed over said first insulating film to cover said wiring-pattern layer; and a conductive shield film formed over said second insulating film substantially complementary to said wiring-pattern layer to substantially cover portions of said semiconductor substrate which are not covered by said wiring pattern layer.
Claim 2
Dependent Claim 109 words
A semiconductor device having high resistance to electrostatic and electromagnetic induction comprising: a semiconductor element formed in a semiconductor substrate; a first insulating film formed on a surface of said semiconductor substrate; a wiring-pattern layer formed on said first insulating film, said wiring-pattern layer contacting said semiconductor substrate through at least one contact hole formed in said first insulating film; a second insulating film formed over said first insulating film to cover said wiring-pattern layer; and a conductive shield film formed over said second insulating film substantially complementary to said wiring-pattern layer to substantially cover portions of said semiconductor substrate which are not covered by said wiring pattern layer.
Claim 3
Dependent Claim 16 words
A semiconductor device according to claim 1 wherein said conductive shield film is connected to ground.
Claim 4
Dependent Claim 25 words
A semiconductor device according to claim 1 wherein said semiconductor element comprises a light-receiving integrated circuit including a light sensitive region and an amplifier element.
Claim 5
Dependent Claim 14 words
A semiconductor device according to claim 3 wherein said conductive shield film is transparent.
Claim 6
Dependent Claim 21 words
A semiconductor device according to claim 3 wherein said conductive shield film does not overlap any portion of said wiring-pattern layer.
Claim 7
Dependent Claim 19 words
A semiconductor device according to claim 3 wherein said conductive shield film overlaps selected portions of said wiring-pattern layer.
Claim 8
Dependent Claim 20 words
A semiconductor device according to claim 6 wherein said selected portions are portions of said wiring-pattern layer at ground potential.
Claim 9
Dependent Claim 29 words
A semiconductor device according to claim 6 wherein said selected portions are those portions of said wiring-pattern layer formed around said light sensitive region of said light-receiving integrated circuit.
Claim 10
Dependent Claim 134 words
A semiconductor device having high resistance to electrostatic and electromagnetic induction comprising: a semiconductor element formed in a semiconductor substrate; a first insulating film formed on a surface of said semiconductor substrate; a wiring-pattern layer formed on said first insulating film, said wiring pattern layer contacting said semiconductor substrate through at least one contact hole formed in said first insulating film; a second insulating film formed over said first insulating film to cover said wiring-pattern layer; a conductive shield film formed over said second insulating film substantially complementary to said wiring pattern layer except to portions of said wiring-pattern layer at ground potential and portions of said semiconductor element and said wiring-pattern layer which are extremely sensitive to electrostatic and electromagnetic induction, said conductive shield substantially covering all other portions of said semiconductor device.
Claim 11
Dependent Claim 134 words
A semiconductor device having high resistance to electrostatic and electromagnetic induction comprising: a semiconductor element formed in a semiconductor substrate; a first insulating film formed on a surface of said semiconductor substrate; a wiring-pattern layer formed on said first insulating film, said wiring pattern layer contacting said semiconductor substrate through at least one contact hole formed in said first insulating film; a second insulating film formed over said first insulating film to cover said wiring-pattern layer; a conductive shield film formed over said second insulating film substantially complementary to said wiring pattern layer except to portions of said wiring-pattern layer at ground potential and portions of said semiconductor element and said wiring-pattern layer which are extremely sensitive to electrostatic and electromagnetic induction, said conductive shield substantially covering all other portions of said semiconductor device.
Claim 12
Dependent Claim 15 words
A semiconductor device according to claim 9 wherein said conductive shield is coupled to ground.
Claim 13
Dependent Claim 25 words
A semiconductor device according to claim 9 wherein said semiconductor element comprises a light-receiving integrated circuit including a light sensitive region and an amplifier element.
Claim 14
Dependent Claim 14 words
A semiconductor device according to claim 11 wherein said conductive shield film is transparent.

References Cited (Backward Citations)

JPS5258491A Cited
JPS5645070A Cited
JPS5954270A Cited
JPS60177685A Cited
JPS60178646A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-01-03 1992-07-04 1993-01-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-01-03 1996-07-04 1997-01-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-01-03 2000-07-04 2001-01-03 $7700.00 Window Closed / Lapsed

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