← Back to Patent Explorer
US4791722A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of designing and manufacturing circuits using universal circuit board

Assignee: Lockheed Martin Corp
•
Filing: 1986-12-23
•
Granted: 1988-12-20
•
Expires: 2006-12-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A printed circuit for mounting and connecting a plurality of semiconductor devices is disclosed and includes a planar insulating substrate having multiple conductive layers disposed in overlying relationship within the planar substrate. A plurality of parallel rows of apertures for wire wrap, quick connect or stitch wire contacts are provided for mounting integrated circuit. One side of the printed circuit board includes a plurality of power and ground connections disposed between each pair of parallel rows of apertures so that filter capacitors may be mounted under each integrated circuit, thereby conserving printed circuit board space. In a preferred mode of the present invention, alternate ones of the conductive layers are coupled to a source of electrical power while all remaining conductive layers are gounded. At least two adjacent conductive layers are then utilized to minimize parasitic capacitance by completely surrounding each aperture with a portion of conductive material.

Inventors

  • 👤 Grady A. Miller, Jr.

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 02:16
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/22; H05K3/222; H05K1/00; H05K1/02; H05K1/0286; H05K1/029; H05K1/0213; H05K1/0216; H05K1/023; H05K1/0231; H05K1/0287; H05K1/0296; H05K1/0298; H05K2201/00; H05K2201/10; H05K2201/10227; H05K2201/10287; H05K2201/10333; H05K2201/10613; H05K2201/10621; H05K2201/10689; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49162

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 75 words
A method of designing and manufacturing a circuit on a circuit board, the method comprising the steps of: (a) placing removable wire insulator lancer terminals into predetermined holes in the circuit board and connecting first wires between certain ones of the insulator lancer terminals; (b) removing the lancer terminals and the first wires; (c) placing socket contact terminals into the predetermined holes; and (d) connecting second wires between certain ones of the socket contact terminals.
Claim 2
Independent Claim 75 words
A method of designing and manufacturing a circuit on a circuit board, the method comprising the steps of: (a) placing removable wire insulator lancer terminals into predetermined holes in the circuit board and connecting first wires between certain ones of the insulator lancer terminals; (b) removing the lancer terminals and the first wires; (c) placing socket contact terminals into the predetermined holes; and (d) connecting second wires between certain ones of the socket contact terminals.
Claim 3
Dependent Claim 17 words
The method of claim 1 wherein the step of connecting second wires uses a computer-controlled robotic welder.
Claim 4
Dependent Claim 30 words
The method of claim 2 wherein step (a) further includes recording x and y coordinates of the lancer terminals after the lancer terminals have been placed in the predetermined holes.

References Cited (Backward Citations)

US3205469A Cited
US3644792A Cited
US3917984A Cited
US4129349A Cited
US4387509A Cited
US4461061A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-12-20 1992-06-20 1992-12-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-12-20 1996-06-20 1996-12-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-12-20 2000-06-20 2000-12-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag