US4788511A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Distributed power amplifier
Assignee: Raytheon Co
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Filing: 1987-11-30
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Granted: 1988-11-29
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Expires: 2007-11-30
Abstract
Abstract A distributed amplifier includes a plurality of field effect transistors, each having gate, drain, and source electrodes, successively coupled between an input terminal and an output terminal. The gate electrode of each one of successively coupled FETS is coupled to the input terminal through a corresponding one of a plurality of capacitors and selected ones of the drain electrodes of the FETS are coupled to the output terminal through one of a corresponding second plurality of capacitors, with said capacitors being coupled to an output coupling means comprising a plurality of transmission line sections. By providing the second plurality of capacitors to couple the drain electrodes to the output terminal, the output impedance of each one of the field effect transistors is concomitantly increased thereby permitting the periphery of the transistors to be correspondingly increased and thereby providing increased output power and gain from the amplifier circuit.
Inventors
- 👤 Manfred J. Schindler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 01:57
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/60; H03F3/605; H03F3/607
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
108 words
In combination: a plurality of successively coupled field effect transistors, each one thereof having an input electrode and an output electrode, with said transistors further having a predetermined reactive component between the output electrode and a reference potential; input means for feeding input signals to the input electrode of each one of said transistors; and output means for successively coupling the output electrode of each one of the transistors to an output terminal, said means further including: means, coupled between the output electrode of at least a selected one of the transistors and said means for successively coupling, for reducing the effective output capacitance of the selected transistor.
Claim 2
Dependent Claim
108 words
In combination: a plurality of successively coupled field effect transistors, each one thereof having an input electrode and an output electrode, with said transistors further having a predetermined reactive component between the output electrode and a reference potential; input means for feeding input signals to the input electrode of each one of said transistors; and output means for successively coupling the output electrode of each one of the transistors to an output terminal, said means further including: means, coupled between the output electrode of at least a selected one of the transistors and said means for successively coupling, for reducing the effective output capacitance of the selected transistor.
Claim 3
Dependent Claim
62 words
The combination as recited in claim 1 wherein the output means further includes a common transmission line, and a plurality of transmission lines coupled between the output electrodes of the unselected transistors and the common transmission line, and said means for reducing effective output capacitance includes a capacitor connected between the common transmission line and the output electrode of the selected transistor.
Claim 4
Dependent Claim
49 words
The combination of claim 2 wherein the value of capacitance of the capacitor coupled between the output electrode of the coupled transistor and the common transmission line is selected in accordance with an inherent output capacitance of the coupled transistor to provide the coupled transistor with a selected impedance.
Claim 5
Dependent Claim
41 words
The combination as recited in claim 1 wherein the output means includes a plurality of capacitors, each one of said capacitors being coupled between the output electrode of a corresponding one of said plurality of transistors and the output coupling means.
Claim 6
Dependent Claim
42 words
The combination of claim 4 wherein the value of capacitance of each one of the plurality capacitors is selected in accordance with an inherent output capacitance of each of the transistors to provide each of the transistors with a selected output impedance.
Claim 7
Dependent Claim
47 words
The combination of claim 5 wherein the output coupling means further includes a common distributed transmission line coupled between the output terminal and a bias terminal and wherein the capacitors are coupled between the output electrodes of the plurality of transistors and said common distributed transmission line.
Claim 8
Dependent Claim
35 words
The combination as recited in claim 2 further comprising means for providing a D.C. bias signal to the output electrode of each transistor having a capacitor coupled to the output electrode and common transmission line.
Claim 9
Dependent Claim
22 words
The combination as recited in claim 7 wherein the bias circuit includes low pass filters connected to the capacitor coupled output electrode.
Claim 10
Dependent Claim
34 words
The combination as recited in claim 7 wherein the bias circuit includes at least one inductor connected between the output electrode of a capacitor coupled transistor and the output electrode of a preceding transistor.
Claim 11
Dependent Claim
133 words
A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled field effect transistors, each one thereof having an input electrode, a reference electrode and an output electrode; a radio frequency coupling means for successively coupling the input electrode of each one of said transistors to the input terminal, said means including a radio frequency transmission line and a plurality of capacitors with each one of said capacitors being connected between one of the input electrodes and said radio frequency transmission line; output means for successively coupling the output electrode of each transistor to the output terminal, said output means further including, a common coupling means, and at least one capacitor connected between the common coupling means and output electrode of a selected one of said transistors.
Claim 12
Dependent Claim
133 words
A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled field effect transistors, each one thereof having an input electrode, a reference electrode and an output electrode; a radio frequency coupling means for successively coupling the input electrode of each one of said transistors to the input terminal, said means including a radio frequency transmission line and a plurality of capacitors with each one of said capacitors being connected between one of the input electrodes and said radio frequency transmission line; output means for successively coupling the output electrode of each transistor to the output terminal, said output means further including, a common coupling means, and at least one capacitor connected between the common coupling means and output electrode of a selected one of said transistors.
Claim 13
Dependent Claim
18 words
The distributed amplifier of claim 10 wherein said capacitor is connected to the transistor nearest said output terminal.
Claim 14
Dependent Claim
56 words
The distributed amplifier as recited in claim 10 wherein the output means further includes a common transmission line, a plurality of transmission lines connected between the output electrodes of the field effect transistors and the common transmission line with said capacitor being connected between the common transmission line and the output electrodes of the last transistor.
Claim 15
Dependent Claim
60 words
The distributed amplifier of claim 12 wherein the value of capacitance of the capacitor coupled between the drain electrode of the transistor mearest the output terminal is selected in accordance with an inherent output capacitance of said transistor nearest the output terminal to increase an output impedance of said transistor over a frequency band of operation of said distributed amplifier.
Claim 16
Dependent Claim
27 words
The combination as recited in claim 13 further comprising means for providing a D.C. bias signal to the drain electrodes of the transistor nearest the output terminal.
Claim 17
Dependent Claim
16 words
The combination as recited in claim 14 wherein the bias circuit means includes low pass filter.
Claim 18
Dependent Claim
34 words
The combination as recited in claim 14 wherein the bias circuit is an inductor connected between the drain electrode of the transistor nearest the output terminal, and the drain electrode of a preceding transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-29 | 1992-05-30 | 1992-11-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-29 | 1996-05-30 | 1996-11-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-29 | 2000-05-30 | 2000-11-29 | $7700.00 | Window Closed / Lapsed |