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US4785257A Expired / Lapsed US ⏱️ 0.0 years remaining

Power amplifier circuit for an audio circuit

Assignee: Yamaha Corp
•
Filing: 1987-05-26
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Granted: 1988-11-15
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Expires: 2007-05-26
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Abstract

Abstract A power amplifier circuit with less harmonic distortion factor and with remarkably high slew rate consists of a drive amplifier, an output amplifier, a distortion cancellation circuit, a negative feedback loop and a primary amplifier. The output amplifier having an impedance load is driven by the drive amplifier and performs the push-pull amplifier operation. The distortion cancellation circuit drives the impedance load with a voltage gain of "1", whereby the distortion cancellation circuit cancels the distortion included in the output voltage of the output amplifier based on the voltage difference between the input and output voltages of the output amplifier. Hence, the apparent gain of the output amplifier is infinite. The negative feedback loop feeds the output voltage back to the primary amplifier as a negative feedback voltage. The primary amplifier drives the drive amplifier based on the voltage difference between the arbitrary input voltage and the negative feedback voltage.

Inventors

  • 👤 Kenji Yokoyama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 06:27
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/32; H03F1/3217; H03F1/34

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 195 words
A power amplifier circuit for an audio circuit comprising: (a) a drive amplifier having an impedance load, said drive amplifier driving said impedance load by use of a first power voltage from a first power source so that a first input voltage is amplified in said drive amplifier wherein the amplified first input voltage is outputted as a first output voltage; (b) an output amplifier being driven by said first output voltage so that said output amplifier outputs the amplified first output voltage as a second output voltage; (c) a distortion cancellation circuit for driving said impedance load with a voltage gain of "1" by use of a second power voltage from a second power source based on a first voltage difference between said first output voltage and said second output voltage, whereby a distortion included in said second output voltage is canceled by said distortion cancellation circuit; and (d) a negative feedback loop for negatively feeding back said second output voltage to a primary amplifier as a negative feedback voltage, said primary amplifier generating said first input voltage based on a second voltage difference between said negative feedback voltage and an arbitrary input voltage.
Claim 2
Dependent Claim 195 words
A power amplifier circuit for an audio circuit comprising: (a) a drive amplifier having an impedance load, said drive amplifier driving said impedance load by use of a first power voltage from a first power source so that a first input voltage is amplified in said drive amplifier wherein the amplified first input voltage is outputted as a first output voltage; (b) an output amplifier being driven by said first output voltage so that said output amplifier outputs the amplified first output voltage as a second output voltage; (c) a distortion cancellation circuit for driving said impedance load with a voltage gain of "1" by use of a second power voltage from a second power source based on a first voltage difference between said first output voltage and said second output voltage, whereby a distortion included in said second output voltage is canceled by said distortion cancellation circuit; and (d) a negative feedback loop for negatively feeding back said second output voltage to a primary amplifier as a negative feedback voltage, said primary amplifier generating said first input voltage based on a second voltage difference between said negative feedback voltage and an arbitrary input voltage.
Claim 3
Dependent Claim 43 words
A power amplifier circuit according to claim 1, wherein said first power voltage is a predetermined negative voltage and said second power voltage is a predetermined positive voltage, absolute voltages of said first and second power voltages being set to the same voltage.
Claim 4
Dependent Claim 37 words
A power amplifier circuit according to claim 1, wherein said output amplifier is a push-pull amplifier including first and second transistors the types of which are different so as to perform a complementary operation with each other.
Claim 5
Dependent Claim 45 words
A power amplifier circuit according to claim 3, wherein each of said first and second transistors have bases and wherein the output voltage from said distortion cancellation circuit and said first output voltage are supplied respectively to the bases of said first and second transistors.
Claim 6
Dependent Claim 63 words
A power amplifier circuit according to claim 4, wherein said distortion cancellation circuit consists of a differential amplifier and a current mirror circuit, said differential amplifier generating a first current corresponding to said first voltage difference between said first and second output voltages, said current mirror circuit providing a second current identical to said first current into the base of said first transistor.
Claim 7
Dependent Claim 104 words
A power amplifier circuit according to claim 5, wherein said differential amplifier is a first such amplifier and said current mirror circuit is a first such circuit and said primary amplifier consists of a second differential amplifier and a second current mirror circuit, said second differential amplifier generating a third current corresponding to said second voltage difference between said negative feedback voltage from said negative feedback loop and said arbitrary input voltage, said second current mirror circuit outputting a fourth current identical to said third current into said drive amplifier so that said first input voltage is produced and inputted into said drive amplifier.
Claim 8
Dependent Claim 61 words
A power amplifier circuit according to claim 5 further including a bootstrap circuit, said bootstrap circuit prevents said first transistor within said output amplifier from being broken down when a voltage at a collector of a transistor included in said first current mirror circuit exceeds said second power voltage so that said first amplifier is subjected to a reverse bias state.
Claim 9
Dependent Claim 91 words
A power amplifier circuit according to claim 4, wherein said distortion cancellation circuit consists of a third transistor having a base, emitter and collector and a current mirror circuit, said first voltage difference between said first and second output voltages being applied between the base and the emitter of said third transistor so that a first current corresponding to said first voltage difference flows into the collector of said third transistor, said current mirror circuit outputting a second current identical to said first current into the base of said first transistor.
Claim 10
Dependent Claim 83 words
A power amplifier circuit according to claim 8, wherein said primary amplifier consists of a differential amplifier and a second current mirror circuit, said differential amplifier generating a third current corresponding to said second voltage difference between said negative feedback voltage from said negative feedback loop and said arbitrary input voltage, said second current mirror circuit outputting a fourth current identical to said third current into said drive amplifier so that said first input voltage is produced and inputted into said drive amplifier.
Claim 11
Dependent Claim 60 words
A power circuit according to claim 9 further including a bootstrap circuit, said bootstrap circuit preventing said first transistor within said output amplifier from being broken down when a voltage at a collector of a transistor included in said first current mirror circuit exceeds said second power voltage so that said first amplifier is subjected to a reverse bias state.

References Cited (Backward Citations)

US4476442A Cited
US4706035A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-11-15 1992-05-16 1992-11-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-11-15 1996-05-16 1996-11-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-11-15 2000-05-16 2000-11-15 $7700.00 Window Closed / Lapsed

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