US4783729A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Automatic voltage doubler switch
Assignee: Zenith Electronics LLC
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Filing: 1987-09-25
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Granted: 1988-11-08
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Expires: 2007-09-25
Abstract
Abstract An automatic voltage doubler switch includes a Triac having a gate electrode that is driven by a relaxation oscillator that includes a Diac switch. A capacitor, charged from a voltage that is indicative of the AC line voltage, triggers the Triac through the Diac switch to complete a conductive path for converting the power supply from a direct operating mode to a voltage doubler operating mode. A cutoff transistor senses the AC line voltage and functions to disable the relaxation oscillator when the AC line is at a particular level. A hysteresis circuit reduces the resistance in the base circuit of a line voltage detector transistor to keep it in conduction despite further drops in line voltage. A hysteresis inhibit transistor operates on power up of the power supply to override the effects of the hysteresis circuit.
Inventors
- 👤 John G. Konopka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:56
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/30; H03K17/305; H02; H02M; H02M1/00; H02M1/10; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/2893
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
92 words
An automatic voltage doubler circuit comprising: rectifying means coupled to an AC line and selectively operable in either a diect mode or in a voltage doubler mode; switch means for changing the operating mode of said rectifying means; charging means responsive to a first voltage level on said AC line for operating said switch means; cutoff means for disabling said charging means responsive to a second voltage level on said AC line; and delay means coupled to said charging means for disabling said charging means during power up of said rectifying means.
Claim 2
Dependent Claim
92 words
An automatic voltage doubler circuit comprising: rectifying means coupled to an AC line and selectively operable in either a diect mode or in a voltage doubler mode; switch means for changing the operating mode of said rectifying means; charging means responsive to a first voltage level on said AC line for operating said switch means; cutoff means for disabling said charging means responsive to a second voltage level on said AC line; and delay means coupled to said charging means for disabling said charging means during power up of said rectifying means.
Claim 3
Dependent Claim
31 words
The circuit of claim 1 wherein said switch means comprises a Triac and wherein said charging means includes a Diac and a resistance/capacitance network coupled to said Triac through said Diac.
Claim 4
Dependent Claim
21 words
The circuit of claim 2, further including hysteresis means establishing a range of AC line voltage levels for said cutoff means.
Claim 5
Dependent Claim
24 words
The circuit of claim 3, further including hysteresis inhibiting means for inhibiting opration of said hysteresis means during power up of said rectifying means.
Claim 6
Dependent Claim
119 words
An automatic voltage doubler circuit comprising: rectifying means, having direct and voltage doubler modes of operation, coupled to an AC line; Triac switch means for changing the operating mode of said rectifying means to said doubler mode; self-oscillating pulse means, for triggering said Triac means into conduction, oscillating at a frequency that is greater than the frequency of said AC line; a cutoff transistor for disabling said oscillating means in response to a first voltage level of said AC line; hysteresis means coupled to said cutoff transistor for delaying subsequent operation of said cutoff transistor until a second voltage level of said AC line; and transistor means for disabling said hysteresis means upon power up of said power supply.
Claim 7
Dependent Claim
119 words
An automatic voltage doubler circuit comprising: rectifying means, having direct and voltage doubler modes of operation, coupled to an AC line; Triac switch means for changing the operating mode of said rectifying means to said doubler mode; self-oscillating pulse means, for triggering said Triac means into conduction, oscillating at a frequency that is greater than the frequency of said AC line; a cutoff transistor for disabling said oscillating means in response to a first voltage level of said AC line; hysteresis means coupled to said cutoff transistor for delaying subsequent operation of said cutoff transistor until a second voltage level of said AC line; and transistor means for disabling said hysteresis means upon power up of said power supply.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-08 | 1992-05-09 | 1992-11-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-08 | 1996-05-09 | 1996-11-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-08 | 2000-05-09 | 2000-11-08 | $7700.00 | Window Closed / Lapsed |