US4782378A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor having integrated stabilizing resistor and method of making thereof
Assignee: Fuji Electric Co Ltd
•
Filing: 1987-11-18
•
Granted: 1988-11-01
•
Expires: 2007-11-18
Abstract
Abstract A resistively stabilized transistor in which secondary breakdown is prevented by the insertion of a floating emitter protection region around only one end of a stabilizing resistive region. The transistor includes an ordinary emitter region located within a base region. A floating emitter region surrounds the ordinary emitter region. An elongated stabilizing resistive region has one end connected to the ordinary emitter region and the other to the base region. The protection region is positioned around, but spaced from, an end portion of the stabilizing resistive region only in the area where the resistive region connects to the ordinary emitter region.
Inventors
- 👤 Tsuneto Sekiya
- 👤 Shinichi Ito
- 👤 Hisao Shigekane
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 04:23
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/615; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10D48/345; H10D62/00; H10D62/10; H10D62/102; H10D62/103; H10D62/105; H10D62/106; H10D84/101; H10D84/121; H10D84/125
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
175 words
A transistor comprising: an emitter region, a base region having a base electrode, and a collector region, said emitter region being located within said base region; an elongated resistive region of the same conductivity type as said emitter region, said emitter region and said elongated resistive region defined by a single silicon dioxide pattern and a base electrode pattern surrounding said emitter region a first end of said resistive region being connected to said emitter region and a second end of said resistive region being connected to said base region wherein said second end is formed close to said base electrode so that additional resistance to a current through the base region prevents the occurrence of secondary breakdown; and a partially surrounding floating emitter region of the same conductivity type as said emitter region, said partially surrounding floating emitter region only being located spaced apart from and around said first end of said resistive region such that said partially surrounding floating emitter region acts as a floating emitter and prevents the occurrence of secondary breakdown.
Claim 2
Dependent Claim
175 words
A transistor comprising: an emitter region, a base region having a base electrode, and a collector region, said emitter region being located within said base region; an elongated resistive region of the same conductivity type as said emitter region, said emitter region and said elongated resistive region defined by a single silicon dioxide pattern and a base electrode pattern surrounding said emitter region a first end of said resistive region being connected to said emitter region and a second end of said resistive region being connected to said base region wherein said second end is formed close to said base electrode so that additional resistance to a current through the base region prevents the occurrence of secondary breakdown; and a partially surrounding floating emitter region of the same conductivity type as said emitter region, said partially surrounding floating emitter region only being located spaced apart from and around said first end of said resistive region such that said partially surrounding floating emitter region acts as a floating emitter and prevents the occurrence of secondary breakdown.
Claim 3
Dependent Claim
26 words
The transistor of claim 1, wherein said partially surrounding floating emitter region is separated from said resistive region by a narrow gap greater than 10 μm.
Claim 4
Dependent Claim
27 words
The transistor of claim 2, wherein portions of said partially surrounding floating emitter region are positioned on both sides of said first end of said resistive region.
Claim 5
Dependent Claim
12 words
The transistor of claim 1, wherein said transistor is an NPN transistor.
Claim 6
Dependent Claim
12 words
The transistor of claim 1, wherein said transistor is a PNP transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-01 | 1992-05-02 | 1992-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-01 | 1996-05-02 | 1996-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-01 | 2000-05-02 | 2000-11-01 | $7700.00 | Window Closed / Lapsed |