US4779085A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Matrix display panel having alternating scan pulses generated within one frame scan period
Assignee: Canon Inc
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Filing: 1986-08-26
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Granted: 1988-10-18
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Expires: 2006-08-26
Abstract
Abstract The specification and drawings relate to liquid crystal matrix display panel which is used to display a television image or the like and disclose the technology in which: the pixels on a matrix are divided into at least two groups of pixels, in particular, two right and left pixel groups; these pixel groups are respectively independently driven within one horizontal scanning interval; thereby widening the width of the vertical scanning signal and allowing the image signal to be sufficiently transferred to the liquid crystal cells; and thereby allowing a high-quality image to be displayed without causing a lack of luminance or a variation in luminance in association with the realization of a large area and a fine pitch of the display panel.
Inventors
- 👤 Atsushi Mizutome
- 👤 Shinichi Yamashita
- 👤 Hideo Sugano
- 👤 Hiroshi Inoue
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 13:23
CPC Classifications
H; H04; H04N; H04N3/00; H04N3/10; H04N3/12; H04N3/127; G; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/3614; G09G3/3648; G09G3/3666
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
272 words
A display apparatus, comprising: (A) a matrix display panel including an active matrix base plate, said active matrix base plate further comprising, a first group of transistors arranged along a row and a column, and a second group of transistors arranged along the row and the column, wherein said first group of transistors arranged along the row is commonly connected to a gate line for each row, and said first group of transistors arranged along the column is commonly connected to a source line for each column, and wherein said second group of transistors arranged along the row is commonly connected to a second gate line for each row, and said second group of transistors arranged along the column is commonly connected to a source line for each column; (B) first drive means, further comprising, a first scan pulse generation circuit connected to the gate line to which said first group of transistors is connected for each row, and a second scan pulse generation circuit connected to the second gate line to which said second group of transistors is connected for each row, wherein scan pulses are alternatively generated from said first and second scan pulse generation circuits; and (C) second drive means, further comprising: a first data output circuit connected to the source line to which said first group of transistors is connected for each column, and a second data output circuit connected to the source line to which said second group of transistors is connected for each column, wherein data pulses are alternately generated from said first and second data output circuits in synchronism with generation of the scan pulses.
Claim 2
Dependent Claim
272 words
A display apparatus, comprising: (A) a matrix display panel including an active matrix base plate, said active matrix base plate further comprising, a first group of transistors arranged along a row and a column, and a second group of transistors arranged along the row and the column, wherein said first group of transistors arranged along the row is commonly connected to a gate line for each row, and said first group of transistors arranged along the column is commonly connected to a source line for each column, and wherein said second group of transistors arranged along the row is commonly connected to a second gate line for each row, and said second group of transistors arranged along the column is commonly connected to a source line for each column; (B) first drive means, further comprising, a first scan pulse generation circuit connected to the gate line to which said first group of transistors is connected for each row, and a second scan pulse generation circuit connected to the second gate line to which said second group of transistors is connected for each row, wherein scan pulses are alternatively generated from said first and second scan pulse generation circuits; and (C) second drive means, further comprising: a first data output circuit connected to the source line to which said first group of transistors is connected for each column, and a second data output circuit connected to the source line to which said second group of transistors is connected for each column, wherein data pulses are alternately generated from said first and second data output circuits in synchronism with generation of the scan pulses.
Claim 3
Dependent Claim
30 words
A display apparatus according to claim 1, wherein said first data output circuit and said second data output circuit respectively comprise sample-and-hold circuits for alternately sampling and holding input data.
Claim 4
Dependent Claim
59 words
A display apparatus according to claim 1, wherein said first and second data output circuits respectively comprise sample-and-hold circuits for alternately sampling and holding input data, and further comprising a circuit in which, while one of said data output circuits samples and holds the input data, the other of said data output circuits outputs the sampled and held data.
Claim 5
Dependent Claim
31 words
A dispaly apparatus according to claim 1, wherein said first group of transistors and said second group of transistors are respectively divided into right and left regions on a display screen.
Claim 6
Dependent Claim
15 words
A display apparatus according to claim 1, wherein said transistor includes a thin film transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-10-18 | 1992-04-18 | 1992-10-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-10-18 | 1996-04-18 | 1996-10-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-10-18 | 2000-04-18 | 2000-10-18 | $7700.00 | Window Closed / Lapsed |