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US4779074A Expired / Lapsed US ⏱️ 0.0 years remaining

Low level voltage pulse-converter

Assignee: Elsag International BV
•
Filing: 1987-09-14
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Granted: 1988-10-18
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Expires: 2007-09-14
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Abstract

Abstract A convertor for converting an analog signal to a digital pulse comprises a switching capacitor which is charged by a differential analog signal supplied to the switching capacitor over an input circuit. The capacitor is discharged over an output circuit with the aid of a constant current supply. The charge level of the capacitor is proportional to the analog signal so that the time it takes the capacitor to discharge to a selected low charge level, is proportional to the analog signal. This time period is used by a microprocessor control to generate a digital pulse having a pulse equal to the discharge time for the capacitor. The microprocessor also selectively connects the input and output circuits to the capacitor for respectively charging and discharging the capacitor.

Inventors

  • 👤 Rowland E. Whitford
  • 👤 Edward Bastijanic

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 12:34
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/50; H03M1/54

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 257 words
A converter for converting the differential of a pair of analog signals to a digital pulse, comprising: a switching capacitor; an input circuit comprising a differential amplifier for receiving said pair of analog signals and applying said differential signal to said switching capacitor to charge said switching capacitor to a charge level which is proportional to said differential signal; an output circuit connectable to said switching capacitor and including a constant current source for discharging said switching capacitor from its charge level to a selected low level during a discharging period; switching logic means connected to said input and output circuits for connecting said input and output circuits one at a time to said switching capacitor for charging said switching capacitor to its charge level and for discharging said switching capacitor to the selected low level, said switching logic means connecting said switching capacitor to said input circuit for sufficient time to reach said charge level and connecting said switching capacitor to said output circuit for a time longer than said discharging period, said switching logic means comprising a microprocessor, said input circuit including a first pair of switches controllable by said microprocessor for connection of said differential amplifier to said switching capacitor, said output circuit including a second pair of switches controllable by said microprocessor for discharging said switching capacitor, operation of each pair of said first and second pair of switches occurring substantially simultaneously; and pulse generating means connected to said output circuit for generating a digital pulse having a duration equaling said discharging period.
Claim 2
Dependent Claim 257 words
A converter for converting the differential of a pair of analog signals to a digital pulse, comprising: a switching capacitor; an input circuit comprising a differential amplifier for receiving said pair of analog signals and applying said differential signal to said switching capacitor to charge said switching capacitor to a charge level which is proportional to said differential signal; an output circuit connectable to said switching capacitor and including a constant current source for discharging said switching capacitor from its charge level to a selected low level during a discharging period; switching logic means connected to said input and output circuits for connecting said input and output circuits one at a time to said switching capacitor for charging said switching capacitor to its charge level and for discharging said switching capacitor to the selected low level, said switching logic means connecting said switching capacitor to said input circuit for sufficient time to reach said charge level and connecting said switching capacitor to said output circuit for a time longer than said discharging period, said switching logic means comprising a microprocessor, said input circuit including a first pair of switches controllable by said microprocessor for connection of said differential amplifier to said switching capacitor, said output circuit including a second pair of switches controllable by said microprocessor for discharging said switching capacitor, operation of each pair of said first and second pair of switches occurring substantially simultaneously; and pulse generating means connected to said output circuit for generating a digital pulse having a duration equaling said discharging period.
Claim 3
Dependent Claim 49 words
A converter according to claim 1, wherein said pulse generating means comprises a comparator having one input connected to one side of said switching capacitor over said output circuit and another input connected to a reference voltage for establishing said selected low level of charge for said switching capacitor.

References Cited (Backward Citations)

US2937369A Cited
US3271651A Cited
US4368457A Cited
US4178585A Cited
US4191942A Cited
US4644323A Cited
US4390864A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-10-18 1992-04-18 1992-10-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-10-18 1996-04-18 1996-10-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-10-18 2000-04-18 2000-10-18 $7700.00 Window Closed / Lapsed

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