Semiconductor memory device having initialization transistor

Claim 1

A semiconductor memory device operable in an operating mode for storing data having a logic "1" or "0" value according to the input data, and being initializable to a predetermined initial logic value, comprising: a first reference potential source comprising a power source having an output selectively at an operating mode voltage output level and an initialization mode voltage output level; a second reference potential source of a ground potential; a data input terminal for supplying said input data to said logic circuit and to which said input data is applied; a logic circuit for performing a prescribed storing operation according to said input data and having an initialization terminal to cause said logic circuit to store a predetermined initial logic value is response to an initialization signal applied thereto; a data output terminal for supplying an output from said logic circuit; and an MOS transistor for supplying said initialization signal to said initialization terminal of said logic circuit in response to said initialization mode voltage output level of said power source, said MOS transistor having a first conduction electrode connected to said data input terminal of said logic circuit, a second conduction electrode connected to a one of said first and second reference potential sources, and having a gate electrode connected to a one of said first and second reference potential sources; said MOS transistor having a fixed threshold voltage selected to be higher than said operating mode voltage output level and lower than said initialization mode voltage output level of said power source in said operating mode.