US4776026A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for rotating a dot matrix pattern by 90 degrees
Assignee: NEC Corp
•
Filing: 1987-11-17
•
Granted: 1988-10-04
•
Expires: 2007-11-17
Abstract
Abstract An improved circuit for rotating an n×n dot-matrix through 90° includes n latch circuits, each of which latches a column of the dot-matrix, and n output buffers, each of which is connected to the latch circuits susch that like-numbered bits of all matrix columns are forwarded to the same one output buffer.
Inventors
- 👤 Shuziro Ueyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 01:17
CPC Classifications
G; G06; G06T; G06T3/00; G06T3/60
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
80 words
An apparatus for rotating an n×n dot matrix pattern by 90 degrees, comprising: n latch means, each latching one n-bit column of said dot matrix pattern; and n output buffer means, each connected to an output of each of said n latch means, each outputting a set of n bits taken one from each column, said set of n bits constituting a column of an output dot matrix pattern rotated by 90 degrees with respect to said dot matrix pattern.
Claim 2
Independent Claim
80 words
An apparatus for rotating an n×n dot matrix pattern by 90 degrees, comprising: n latch means, each latching one n-bit column of said dot matrix pattern; and n output buffer means, each connected to an output of each of said n latch means, each outputting a set of n bits taken one from each column, said set of n bits constituting a column of an output dot matrix pattern rotated by 90 degrees with respect to said dot matrix pattern.
Claim 3
Dependent Claim
47 words
An apparatus as claimed in claim 1, wherein said n output buffer means are connected to the outputs of each of said latch means in a manner such that like-ordered bits of each of said columns are connected to the same one of said n output buffers.
Claim 4
Dependent Claim
71 words
An apparatus as claimed in claim 1, further comprising decoder means for receiving a plurality of address signals and for generating n control signals in response thereto; first gate means for receiving said n control signals and for generating n latch signals for said respective n latch means; and second gate means for receiving said n control signals and for successively generating n enable signals for said respective output buffer means.
Claim 5
Dependent Claim
17 words
An apparatus as claimed in claim 1, wherein each of said latch means includes n D-type flip-flops.
Claim 6
Dependent Claim
18 words
An apparatus as claimed in claim 1, wherein each of said output buffer means includes n tri-state gates.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-10-04 | 1992-04-04 | 1992-10-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-10-04 | 1996-04-04 | 1996-10-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-10-04 | 2000-04-04 | 2000-10-04 | $7700.00 | Window Closed / Lapsed |