US4774555A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Power hemt structure
Assignee: Siemens Corporate Research and Support Inc
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Filing: 1987-08-07
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Granted: 1988-09-27
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Expires: 2007-08-07
Abstract
Abstract A modulation-doped field effect transistor comprises a gate recess through a top insulating layer, having a cross-section in a semiconductor layer increasing down to an interface with a further semiconductor layer and thereafter having a cross-section in the further semiconductor layer decreasing down to the bottom of the recess in the further semiconductor layer. A gate electrode is formed in the recess.
Inventors
- 👤 Erhard Kohn
- 👤 Mark E. Schneider
- 👤 Chia-Jen Wu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 09:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/015; H10D30/40; H10D30/47; H10D30/471; H10D30/475; H10D30/4755; H10D64/00; H10D64/01; H10D64/012; H10D64/0124; H10D64/0125; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10P; H10P50/00; H10P50/20; H10P50/24; H10P50/246
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
114 words
A modulation-doped field effect transistor comprising: gate electrode means; a first semiconductor layer; a second semiconductor layer, formed over said first semiconductor layer so as to form a first interface therewith; and an insulating etch mask layer formed over said second semiconductor layer so as to form a second interface therewith, said insulating etch mask layer having a hole therethrough for a gate electrode, said hole extending through said second semiconductor layer into said first semiconductor layer and having respective first and second wall portions in said first and second semiconductor layers, said first and second wall portions generally exhibiting respective slopes of opposite sign, said gate electrode means being formed in said hole.
Claim 2
Dependent Claim
114 words
A modulation-doped field effect transistor comprising: gate electrode means; a first semiconductor layer; a second semiconductor layer, formed over said first semiconductor layer so as to form a first interface therewith; and an insulating etch mask layer formed over said second semiconductor layer so as to form a second interface therewith, said insulating etch mask layer having a hole therethrough for a gate electrode, said hole extending through said second semiconductor layer into said first semiconductor layer and having respective first and second wall portions in said first and second semiconductor layers, said first and second wall portions generally exhibiting respective slopes of opposite sign, said gate electrode means being formed in said hole.
Claim 3
Dependent Claim
36 words
A modulation-doped field effect transistor as recited in claim 1 wherein each of said first and second wall portions slopes away from a longitudinal axis of said hole in a respective direction towards said first interface.
Claim 4
Dependent Claim
33 words
A modulation-doped field effect transistor as recited in claim 2 wherein said hole exhibits a greater cross-section at said second interface in said second semiconductor layer than in said insulating etch mask layer.
Claim 5
Dependent Claim
21 words
A modulation-doped field effect transistor as recited in claim 3 wherein said hole reaches a bottom in said first semiconductor layer.
Claim 6
Dependent Claim
171 words
A modulation-doped field effect transistor comprising: gate electrode means; a first semiconductor layer, being substantially undoped; a second semiconductor layer of a first conductivity type, formed over said first layer; a third semiconductor layer, formed over said second semiconductor layer; an insulating layer formed over said third layer, said insulating layer having a hole of a first cross-section therethrough for receiving a control gate, said hole extending through said third semiconductor layer into said second semiconductor layer to a bottom therein, said hole exhibiting an undercut region under said insulating layer having a second cross-section in said second semiconductor layer immediately below said insulating layer greater than said first cross-section, exhibiting a cross-section in said second semiconductor layer increasing towards said first semiconductor layer to a third cross-section at an interface between said first and second semiconductor layers, and thereafter exhibiting a cross-section in said first semiconductor layer decreasing towards said bottom of said hole to a fourth cross-section at said bottom, said gate electrodes means being formed in said hole.
Claim 7
Dependent Claim
171 words
A modulation-doped field effect transistor comprising: gate electrode means; a first semiconductor layer, being substantially undoped; a second semiconductor layer of a first conductivity type, formed over said first layer; a third semiconductor layer, formed over said second semiconductor layer; an insulating layer formed over said third layer, said insulating layer having a hole of a first cross-section therethrough for receiving a control gate, said hole extending through said third semiconductor layer into said second semiconductor layer to a bottom therein, said hole exhibiting an undercut region under said insulating layer having a second cross-section in said second semiconductor layer immediately below said insulating layer greater than said first cross-section, exhibiting a cross-section in said second semiconductor layer increasing towards said first semiconductor layer to a third cross-section at an interface between said first and second semiconductor layers, and thereafter exhibiting a cross-section in said first semiconductor layer decreasing towards said bottom of said hole to a fourth cross-section at said bottom, said gate electrodes means being formed in said hole.
Claim 8
Dependent Claim
26 words
A modulation-doped field effect transistor as recited in claim 5 wherein said gate electrode means comprises a bottom portion thereof abutting said bottom of said hole.
Claim 9
Dependent Claim
26 words
A modulation-doped field effect transistor as recited in claim 6 wherein said bottom portion of said gate means exhibits a cross-section smaller than said fourth cross-section.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-09-27 | 1992-03-28 | 1992-09-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-09-27 | 1996-03-28 | 1996-09-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-09-27 | 2000-03-28 | 2000-09-27 | $7700.00 | Window Closed / Lapsed |