US4771251A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Ring oscillator
Assignee: Control Data Corp
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Filing: 1987-10-23
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Granted: 1988-09-13
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Expires: 2007-10-23
Abstract
Abstract An improved ring oscillator for VLSI chips is shown, formed at the chip periphery. It may have specific initiation gates and have additional parasitic capacitance added to the ring to enhance accuracy. The circuit elements used for the ring are the same as those used for more centralized circuits.
Inventors
- 👤 David H. Allen
- 👤 Michael F. Maas
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 19:00
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/03; H03K3/0315; G; G01; G01R; G01R31/00; G01R31/26; G01R31/2644; G01R31/28; G01R31/30; G01R31/317; G01R31/3181; G01R31/3185; G01R31/318533; G01R31/318536; G01R31/318538; G01R31/318552
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
89 words
In a VLSI chip, a ring oscillator having: an even number of inverters connected in a ring in series with a logical NAND means functioning as an initiation gate physically distributed around the chip periphery, an input pin for providing an initiation pulse connected as input to said initiation gate so as to start an oscillation of the pulse around the ring, and an output connected to the ring at a point other than the input for said initiation gate and to a pin other than said input pin.
Claim 2
Dependent Claim
89 words
In a VLSI chip, a ring oscillator having: an even number of inverters connected in a ring in series with a logical NAND means functioning as an initiation gate physically distributed around the chip periphery, an input pin for providing an initiation pulse connected as input to said initiation gate so as to start an oscillation of the pulse around the ring, and an output connected to the ring at a point other than the input for said initiation gate and to a pin other than said input pin.
Claim 3
Dependent Claim
30 words
A ring oscillator as set forth in claim 1 wherein gates used in the inverters are the same size as the gates used in the core logic of the chip.
Claim 4
Dependent Claim
89 words
In a VLSI chip, a ring oscillator having: an even number of inverters connected in a ring in series with a logical NOR means functioning as an initiation gate physically distribed around the chip periphery. an input pin for providing an initiation pulse connected as input to said initiation gate so as to start an oscillation of the pulse around the ring, and an output connected to the ring at a point other than the input for said initiation gate and to a pin other than said input pin,
Claim 5
Dependent Claim
89 words
In a VLSI chip, a ring oscillator having: an even number of inverters connected in a ring in series with a logical NOR means functioning as an initiation gate physically distribed around the chip periphery. an input pin for providing an initiation pulse connected as input to said initiation gate so as to start an oscillation of the pulse around the ring, and an output connected to the ring at a point other than the input for said initiation gate and to a pin other than said input pin,
Claim 6
Dependent Claim
30 words
A ring oscillator as set forth in claim 3 wherein gates used in the inverters are the same size as the gates used in the core logic of the chip.
Claim 7
Dependent Claim
104 words
A ring oscillator in a VLSI chip having: an even number of inverters connected in a ring in series with an initiation gate physically distributed around the chip periphery, an input pin for providing an initiation pulse connected as input to said initiation gate so as to start an oscillation of the pulse around the ring, and an output connected to the ring at a point other than the input for said initiation gate and to a pin other than said input pin, and wherein conductive material is connected to the ring in such a manner that parasitic capacitance is added to the ring.
Claim 8
Dependent Claim
104 words
A ring oscillator in a VLSI chip having: an even number of inverters connected in a ring in series with an initiation gate physically distributed around the chip periphery, an input pin for providing an initiation pulse connected as input to said initiation gate so as to start an oscillation of the pulse around the ring, and an output connected to the ring at a point other than the input for said initiation gate and to a pin other than said input pin, and wherein conductive material is connected to the ring in such a manner that parasitic capacitance is added to the ring.
Claim 9
Dependent Claim
30 words
A ring oscillator as set forth in claim 5 wherein gates used in the inverters are the same size as the gates used in the core logic of the chip.
References Cited (Backward Citations)
US4495628A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-09-13 | 1992-03-14 | 1992-09-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-09-13 | 1996-03-14 | 1996-09-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-09-13 | 2000-03-14 | 2000-09-13 | $7700.00 | Window Closed / Lapsed |