Metallizing paste for silicon carbide sintered body and a semiconductor device including the same

Claim 2

A metallizing paste for silicon carbide sintered body essentially composed of: mixed powder which has powder of gold as the main constituent thereof and a small amount of cadmium; and an organic binder solution in which said mixed powder is uniformly dispersed.

Claim 3

The metallizing paste for silicon carbide sintered body according to claim 1, wherein said mixed powder is essentially composed of not less than 90 wt % gold and 0.03-3.0 wt % cadmium.

Claim 4

A metallizing paste for silicon carbide sintered body essentially composed of mixed powder which has powder of gold as the main constituent thereof and further contains a small amount of cadmium, a small amount of bismuth, a small amount of copper and a small amount of germanium; and an organic binder solution in which said mixed powder is uniformly dispersed.

Claim 5

A metallizing paste for silicon carbide sintered body essentially composed of mixed powder which has powder of gold as the main constituent thereof and further contains a small amount of cadmium, a small amount of bismuth, a small amount of copper and a small amount of germanium; and an organic binder solution in which said mixed powder is uniformly dispersed.

Claim 6

A metallizing paste for silicon carbide sintered body according to claim 3, wherein said mixed powder is essentially composed of not less, than 90 wt % gold, 0.03 to 3.0 wt % cadmium, 0.1 to 20. wt % bismuth and 0.01 to 1.0 wt % copper.

Claim 7

A metallizing paste for silicon carbide sintered body according to claim 3, wherein said mixed powder is essentially composed of not less than 90 wt % gold, 0.03 to 2.0 wt % cadmium. 0.1 to 2.0 wt % bismuth, 0.01 to 1.0 wt % copper and 0.01 to 2.0 wt % germanium.

Claim 8

A metallizing paste for silicon carbide sintered body comprising: mixed powder which has powder of gold as the main constituent thereof and contains a small amount of cadmium, a small amount of bismuth, a small amount of copper, a small amount of germanium, and a small amount of silicon; and an organic binder solution in which said mixed powder is uniformly dispersed.

Claim 9

A metallizing paste for silicon carbide sintered body comprising: mixed powder which has powder of gold as the main constituent thereof and contains a small amount of cadmium, a small amount of bismuth, a small amount of copper, a small amount of germanium, and a small amount of silicon; and an organic binder solution in which said mixed powder is uniformly dispersed.

Claim 10

A metallizig paste for silicon carbide sintered body according to claim 6, wherein said mixed powder is composed of not less than 90 wt % gold, 0.03 to 2.0 wt % cadmium, 0.1 to 2.0 wt % bismuth, 0.01 to 2.0 wt % germanium 0.01 to 1.0 wt % copper, and 0.01 to 1.0 wt % silicon.

Claim 11

A semiconductor package comprising a semiconductor element (12) disposed on a substrate (10) made of an electrical insulating silicon carbide sintered body; a spacer (26) disposed on said substrate (10) and surrounding semiconductor element (12); a lead frame (18) arranged on said spacer (26); a fine wire (13) electrically connecting said semiconductor element (12) and said lead frame (18); a flange (25) arranged on said lead frame (18); and a cap (20) arranged on said flange (25) so as to seal said semiconductor element (12): characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as it's main constituent and a small amount of cadmium.

Claim 12

A semiconductor package comprising a semiconductor element (12) disposed on a substrate (10) made of an electrical insulating silicon carbide sintered body; a spacer (26) disposed on said substrate (10) and surrounding semiconductor element (12); a lead frame (18) arranged on said spacer (26); a fine wire (13) electrically connecting said semiconductor element (12) and said lead frame (18); a flange (25) arranged on said lead frame (18); and a cap (20) arranged on said flange (25) so as to seal said semiconductor element (12): characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as it's main constituent and a small amount of cadmium.

Claim 13

A semiconductor module comprising a semiconductor element (12) a thick film resistance element (15), a capacitance element (17) and a thick film electrical conductor (14) disposed respectively on a substrate made of an electrical insulating silicon carbide sintered body; and a fine metal wire (13) electrically connecting said semiconductor; thick film resistance and capacitance elements (12, 15, 17) and said thick film electrical conductor (14): characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as it's main constituent and a small amount of cadmium.

Claim 14

A semiconductor module comprising a semiconductor element (12) a thick film resistance element (15), a capacitance element (17) and a thick film electrical conductor (14) disposed respectively on a substrate made of an electrical insulating silicon carbide sintered body; and a fine metal wire (13) electrically connecting said semiconductor; thick film resistance and capacitance elements (12, 15, 17) and said thick film electrical conductor (14): characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as it's main constituent and a small amount of cadmium.

Claim 15

A semiconductor package comprising a semiconductor element (12) and a lead frame (18) disposed on a substrate (10) made of an electrical insulating silicon carbide sintered body; a fine metal wire (13) electrically connecting said semiconductor element (12) and said lead frame (18); and a cap (20) arranged on said lead frame (18) so as to cover and seal said semiconductor element (12) therein: characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as its main constituent and a small amount of cadmium.

Claim 16

A semiconductor package comprising a semiconductor element (12) and a lead frame (18) disposed on a substrate (10) made of an electrical insulating silicon carbide sintered body; a fine metal wire (13) electrically connecting said semiconductor element (12) and said lead frame (18); and a cap (20) arranged on said lead frame (18) so as to cover and seal said semiconductor element (12) therein: characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as its main constituent and a small amount of cadmium.

Claim 17

The semiconductor package according to claim 10 further characterized in that a comb shaped heat radiation fin (21) is formed integrally on the other side of said substrate (10) where said semiconductor element (12) is not disposed.

Claim 18

The semiconductor package according to claim 10 further characterized in that a heat sink (23) with metal heat radiation fins is bonded through a resin (24) on the other side of said substrate (10) where said semiconductor element (12) is not disposed.

Claim 19

A pin grid alley semiconductor device comprising a semiconductor element (12) disposed on a substrate (10) made of an electrical insulating silicon carbide sintered body; a wiring substrate (1) disposed on said substrate (10) and surrounding said semiconductor element (12) a metal wire (13) electrically connecting said semiconductor element (12) and a terminal provided on said wiring substrate (1); a cap arranged on said wiring substrate so as to cover and seal said semiconductor element (12); and a pin (2) for electrical connection arranged on the other side of said wiring substrate (1) not facing to said substrate (10) for said semiconductor element (12): characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as its main constituent and a small amount of cadmium.

Claim 20

A pin grid alley semiconductor device comprising a semiconductor element (12) disposed on a substrate (10) made of an electrical insulating silicon carbide sintered body; a wiring substrate (1) disposed on said substrate (10) and surrounding said semiconductor element (12) a metal wire (13) electrically connecting said semiconductor element (12) and a terminal provided on said wiring substrate (1); a cap arranged on said wiring substrate so as to cover and seal said semiconductor element (12); and a pin (2) for electrical connection arranged on the other side of said wiring substrate (1) not facing to said substrate (10) for said semiconductor element (12): characterized in that said semiconductor element (12) is bonded to said substrate (10) by a metallized layer (11) containing gold as its main constituent and a small amount of cadmium.

Claim 21

The pin grid alley semiconductor device according to claim 13 further characterized in that said wiring substrate (1) is a multilayered board made of ceramic sintered body one selected from the group consisting of alumina, mullite based and silica glass based sintered body.

Claim 22

A semiconductor device comprising a semiconductor element disposed on a substrate made of an electrical insulating silicon carbide sintered body characterized in that said semiconductor element is bonded to said substrate by a metallized layer containing gold as it's main constituent and a small amount of cadmium, and an oxide layer of cadmium and silicon is formed at the interface between said substrate and said metallized layer.

Claim 23

A semiconductor device comprising a semiconductor element disposed on a substrate made of an electrical insulating silicon carbide sintered body characterized in that said semiconductor element is bonded to said substrate by a metallized layer containing gold as it's main constituent and a small amount of cadmium, and an oxide layer of cadmium and silicon is formed at the interface between said substrate and said metallized layer.

Claim 24

The semiconductor device according to claim 15; characterized in that the metallized layer is essentially composed of not less than 90 wt % gold and 0.03-3.0 wt % cadmium.

Claim 25

A semiconductor device comprising a semiconductor element disposed on a substrate made of an electrical insulating silicon carbide sintered body characterized in that said semiconductor element is bonded to said substrate by a metallized layer containing gold as it's main constituent, a small amount of cadmium and at least one selected from the group consisting of a small amount of bismuth, copper, germanium and silicon and an oxide layer of cadmium and silicon is formed at the interface between said substrate and said metallized layer.

Claim 26

A semiconductor device comprising a semiconductor element disposed on a substrate made of an electrical insulating silicon carbide sintered body characterized in that said semiconductor element is bonded to said substrate by a metallized layer containing gold as it's main constituent, a small amount of cadmium and at least one selected from the group consisting of a small amount of bismuth, copper, germanium and silicon and an oxide layer of cadmium and silicon is formed at the interface between said substrate and said metallized layer.

Claim 27

The semiconductor device according to claim 17, further characterized in that said metallized layer is essentially composed of not less than 90 wt % gold, 0.03-3.0 wt % cadmium and at least one selected from the group consisting of 0.1-2.0 wt % bismuth, 0.01-1.0 wt % copper, 0.01-2.0 wt % germanium and 0.01-1.0 wt % silicon.

Claim 28

The semiconductor device according to claim 17 further characterized in that said metallized layer is essentially composed of not less than 90 wt % gold, 0.03-3.0% cadnium, 0.1-2.0 wt % bismuth and 0.01-1.0 wt % copper.

Claim 29

The semiconductor device according to claim 17 further characterized in that said metallized layer is essentially composed of not less than 90 wt % gold, 0.03-2.0 wt % cadimium, 0.1-2.0 wt % bismuth, 0.01-1.0 wt % copper and 0.01-2.0 wt % germanium.