US4768018A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analog to digital converter for an electronic circuit breaker with out-of-supply-range input signals
Assignee: General Electric Co
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Filing: 1987-12-07
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Granted: 1988-08-30
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Expires: 2007-12-07
Abstract
Abstract An oversampled delta-sigma analog to digital converter is used in conjuction with bias resistive means and a single bit digital to analog converter in a feedback loop to permit the utilization of the converter in a system in which the converter elements are supplied with power from the same source which supplies the analog input signal to the converter. Accordingly, a minimum number of on-chip circuit components are provided to extend the operational utility of delta-sigma converter/modulation devices and particularly to permit their utilization in electronic circuit breaker chips and devices.
Inventors
- 👤 Sharbel E. Noujaim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 14:43
CPC Classifications
H; H02; H02H; H02H1/00; H02H1/0007; H03; H03M; H03M3/00; H03M3/30; H03M3/39; H03M3/412; H03M3/422; H03M3/43; H03M3/436; H03M3/456
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
240 words
An analog to digital converter comprising: a set of three two-terminal resistive elements having a first terminal of each element connected to a common electrical node, wherein the first two of said resistive elements have the same resistance value and the third of said resistive elements has a resistive value of half of either of the first two resistive elements; analog integrator means having inverting and non-inverting inputs, said inverting input being connected to said common electrical node with said three two terminal resistive elements; analog comparator means also having inverting and non-inverting input nodes, said inverting input node of said comparator means being connected to the output of said integrator means; single bit clocked flip-flop means operating to change output states in response to the output of said comparator means; inverting means connected at its input to the non-inverted output of said flip-flop means and connected at its output to the second terminal of said second resistive element; means for supplying a voltage V DD to the second terminal of said third resistive means; means for supplying a voltage V DD /2 to the non-inverting nodes of said integrator means and said comparator means, whereby an analog signal applied to the second terminal of said first resistive element is converted to a serial binary signal from said flip-flop means in which the number of bits is representative, over a period of time, of the level of said analog signal.
Claim 2
Dependent Claim
240 words
An analog to digital converter comprising: a set of three two-terminal resistive elements having a first terminal of each element connected to a common electrical node, wherein the first two of said resistive elements have the same resistance value and the third of said resistive elements has a resistive value of half of either of the first two resistive elements; analog integrator means having inverting and non-inverting inputs, said inverting input being connected to said common electrical node with said three two terminal resistive elements; analog comparator means also having inverting and non-inverting input nodes, said inverting input node of said comparator means being connected to the output of said integrator means; single bit clocked flip-flop means operating to change output states in response to the output of said comparator means; inverting means connected at its input to the non-inverted output of said flip-flop means and connected at its output to the second terminal of said second resistive element; means for supplying a voltage V DD to the second terminal of said third resistive means; means for supplying a voltage V DD /2 to the non-inverting nodes of said integrator means and said comparator means, whereby an analog signal applied to the second terminal of said first resistive element is converted to a serial binary signal from said flip-flop means in which the number of bits is representative, over a period of time, of the level of said analog signal.
Claim 3
Dependent Claim
30 words
The converter of claim 1 in which said integrator means comprises an operational amplifier having a capactive element connected between its output and an inverting input of said operational amplifier.
Claim 4
Dependent Claim
21 words
The converter circuit of claim 1 in which voltages V DD and V DD /2 are supplied from the same source.
Claim 5
Dependent Claim
34 words
The converter circuit of claim 1 in which said analog mean, said comparator means and said flip-flop means and said inverting means receive power from the same source that supplies said analog input signal.
Claim 6
Dependent Claim
28 words
The converter circuit of claim 1 in which said clock of said flip-flop means is operable at a frequency greater than the Nyquist frequency of said input signal.
Claim 7
Dependent Claim
177 words
An analog to digital converter comprising: an over-sampled analog-to-digital converter including an integrating operational amplifier with inverting and non-inverting inputs, an analog comparator also having inverting and non-inverting input nodes, said inverting input of said comparator being coupled to the output of said integrating amplifier and a single bit clocked flip-flop means coupled to the output of said comparator so as to change output states in response to the output of said comparator: inversion means coupled at its input to the output of said flip-flop means; means for supplying a voltage V DD /2 to the non-inverting input nodes of said operational amplifier and said comparator; and bias means for receiving voltage signals from an analog input source, from a supply having a voltage V DD and from the output of said inversion means, and for supplying a current to the inverting input node of said operational amplifier, said current being the sum of individual currents each individual current being proportional to one of said voltage V DD , said analog input and said inverter output voltage.
Claim 8
Dependent Claim
177 words
An analog to digital converter comprising: an over-sampled analog-to-digital converter including an integrating operational amplifier with inverting and non-inverting inputs, an analog comparator also having inverting and non-inverting input nodes, said inverting input of said comparator being coupled to the output of said integrating amplifier and a single bit clocked flip-flop means coupled to the output of said comparator so as to change output states in response to the output of said comparator: inversion means coupled at its input to the output of said flip-flop means; means for supplying a voltage V DD /2 to the non-inverting input nodes of said operational amplifier and said comparator; and bias means for receiving voltage signals from an analog input source, from a supply having a voltage V DD and from the output of said inversion means, and for supplying a current to the inverting input node of said operational amplifier, said current being the sum of individual currents each individual current being proportional to one of said voltage V DD , said analog input and said inverter output voltage.
References Cited (Backward Citations)
US4542354A
Cited
US4573037A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-08-30 | 1992-02-29 | 1992-08-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-08-30 | 1996-02-29 | 1996-08-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-08-30 | 2000-02-29 | 2000-08-30 | $7700.00 | Window Closed / Lapsed |