Analog-to-digital conversion apparatus with dither signal

Claim 2

Analog to digital signal conversion apparatus comprising: input signal receiving means for receiving an analog input signal to be digitized by the apparatus; summing means connected to said receiving means and operable for receiving a dither signal and for supplying at an output of the summing means the sum of said dither signal and said analog input signal; an analog to digital converter connected to the summing means and operable for supplying a digital output signal comprising a plurality of bits of which the most significant takes one or the other of the two bit values in dependence upon whether said sum is within one or the other half of a peak to peak digitization range associated with the converter; averaging means connected to the converter for forming a digital signal representative of the time average of the converter output signal; and dither signal supply means connected to the summing means for supplying a dither signal which varies step-wise through a dither range substantially equal to one-half of said peak to peak digitization range of the converter and which, on average, has a substantially uniform occupancy of all the dither range step levels.

Claim 3

Apparatus according to claim 1, wherein the dither signal supply means comprises: first signal supply means for supplying a repetitively and linearly varying first digital signal; second signal supply means for supplying a pseudo-randomly varying second digital signal; a digital to analog converter having an output connected to said summing means, a plurality of higher significance bit inputs connected to said first signal supply means, and a plurality of lower significance bit inputs connected to said second signal supply means.

Claim 4

Apparatus according to claim 2, including; first controllable inverting means connected between said input signal receiving means and said summing means; second controllable inverting means connected between said analog to digital converter and said averaging means; pseudo-random digital sequence generator means connected to the first and second controllable inverter means for causing the first inverter means to invert and not invert said analog input signal during alternate ones of a series of time intervals having a pseudo-random sequence of lengths, and for causing the second inverter means to invert and not invert the converter output signal in synchronism with the operation of the first inverting means, and timing signal generator means connected to said digital sequence generator means, and said first and second signal supply means for synchronizing the repetitions of said pseudo-random sequence of time interval lengths, the repetitions of said first digital signal and the time instants at which there occur changes in level of the second digital signal.

Claim 5

Apparatus according to claim 1, wherein said input signal receiving means comprises multiplexing means for receiving a plurality of analog input signals to be digitized by the apparatus and for passing selected ones of the signals in sequence to the summing means; and wherein said averaging means comprises a memory having a plurality of digital signal storage locations associated with respective ones of said analog input signals, and adding means connected to the converter and the memory for storing at said storage locations respective running totals of the digitized analog input signals.

Claim 6

Analog to digital signal conversion apparatus comprising: an input for receiving an analog input signal; summing means connected to said input and operable for receiving a dither signal and for supplying at an output of the summing means the sum of said dither signal and said analog input signal; an analog to digital converter connected to the output of said summing means and operable for supplying a digital output signal which is representative of said sum provided said sum is within a peak to peak digitization range associated with the converter, and which includes a most significant and a plurality of progressively less significant bits, respective ones of the bits having one or the other of two bit values in dependance upon whether or not the sum is within respective associated quantization intervals having binary relationships with one another and the quantization interval associated with said most significant bit being substantially equal to one half of said peak to peak digitization range; averaging means connected to said converter for forming a digital signal representative of the average of the converter output signal over a predetermined time interval; and dither signal supply means connected to said summing means and operable to supply a dither signal which varies through one half of said digitization range for causing the most significant bit of the converter output signal to have said one and said other bit value for respective proportions of the said time interval which are dependent upon said input signal while causing each less significant bit, irrespective of said input signal, to have one bit value for a total time equal to one half of the predetermined time interval and the other bit value for the remainder of the predetermined time interval.

Claim 7

Analog to digital signal conversion apparatus comprising: an input for receiving an analog input signal; summing means connected to said input and operable for receiving a dither signal and for supplying at an output of the summing means the sum of said dither signal and said analog input signal; an analog to digital converter connected to the output of said summing means and operable for supplying a digital output signal which is representative of said sum provided said sum is within a peak to peak digitization range associated with the converter, and which includes a most significant and a plurality of progressively less significant bits, respective ones of the bits having one or the other of two bit values in dependance upon whether or not the sum is within respective associated quantization intervals having binary relationships with one another and the quantization interval associated with said most significant bit being substantially equal to one half of said peak to peak digitization range; averaging means connected to said converter for forming a digital signal representative of the average of the converter output signal over a predetermined time interval; and dither signal supply means connected to said summing means and operable to supply a dither signal which varies through one half of said digitization range for causing the most significant bit of the converter output signal to have said one and said other bit value for respective proportions of the said time interval which are dependent upon said input signal while causing each less significant bit, irrespective of said input signal, to have one bit value for a total time equal to one half of the predetermined time interval and the other bit value for the remainder of the predetermined time interval.

Claim 8

Apparatus according to claim 5, wherein said dither signal includes a relatively small random or pseudo-random component for reducing the effect of any quantization error of said analog to digital converter.