Adaptive interference cancelling system and method

Claim 2

In a signal processing system for cancelling, from a primary digital electronic signal, components of N auxiliary digital signals by multiplying each of said auxiliary signals by a corresponding one of N weights to produce weighted auxiliary signals and combining said weighted auxiliary signals with said primary signal to provide an output signal which is derived from said primary signal by cancelling correlated components of said N auxiliary signals from said primary signal, said primary signal being one having active and inactive periods and a component of interest which is present only during said active periods, where N is an integer greater than two, the improvement wherein said system comprises: N+1 processing units receiving said N auxiliary signals and said primary signal during one of said inactive periods for producing N(N+1)/2 correlation coefficients L ij , wherein a number N of said N+1 processing units are responsive to said N(N+1)/2 correlation coeffients L ij for producing said N weights, and wherein a number N of said N+1 processing units are responsive to said N weights for multiplying each of said N auxiliary signals during one of said active periods of said primary signal by its corresponding one of said N weights; and means coupled to receive said N weighted auxiliary signals and said active primary signal for combining said N weighted auxiliary signals with said active primary signal to cancel said correlated components of said auxiliary signals from said primary signal.

Claim 3

In a signal processing system for cancelling from a primary digital electronic signal components of N auxiliary digital signals by multiplying each of said auxiliary signals by a corresponding one of N weights to produce weighted auxiliary signals and combining said weighted auxiliary signals with said primary signal to provide an output signal which is derived from said primary signal by cancelling correlated components of said N auxiliary signals from said primary signal, said primary signal being one having active and inactive periods and a component of interest which is present only during said active periods, where N is an integer greater than or equal to three, the improvement wherein said system comprises: N+1 processing units each having first and second configuration for, when in said first configuration, receiving N+1 signals during one of said inactive periods for producing N(N+1)/2 correlation coefficients L ij , said N+1 signals comprising said primary signal and said N auxiliary signals; and when in said second configuration, being responsive to said N(N+1)/2 coefficients L ij for producing said N weights.

Claim 4

In a signal processing system for cancelling from a primary digital electronic signal components of N auxiliary digital signals by multiplying each of said auxiliary signals by a corresponding one of N weights to produce weighted auxiliary signals and combining said weighted auxiliary signals with said primary signal to provide an output signal which is derived from said primary signal by cancelling correlated components of said N auxiliary signals from said primary signal, said primary signal being one having active and inactive periods and a component of interest which is present only during said active periods, where N is an integer greater than or equal to three, the improvement wherein said system comprises: N+1 processing units each having first and second configuration for, when in said first configuration, receiving N+1 signals during one of said inactive periods for producing N(N+1)/2 correlation coefficients L ij , said N+1 signals comprising said primary signal and said N auxiliary signals; and when in said second configuration, being responsive to said N(N+1)/2 coefficients L ij for producing said N weights.

Claim 5

The improvement recited in claim 2, wherein said N+1 processing units have a third configuration for multiplying each of said N auxiliary signals by its corresponding one of said N weights during one of said active periods of said primary signal; and means for combining said weighted auxiliary signals with said active primary signal to cancel said correlated components of said auxiliary signals from said primary signal.

Claim 6

In a signal processing system for cancelling from a primary digital electronic signal components of first through N th auxiliary digital signals, when N is an integer greater than two, the improvement wherein said system comprises: N+1 processing units ordered one through N+1; said first processing unit having a first input terminal and first and second output terminals; each of said second through (N+1) th processing units having first through fourth input terminals and a first output terminal; each of said first through N th processing units having said first input terminal thereof coupled to said first output terminal of the next higher order processing unit and to selectively receive, respectively, said first through N th auxiliary digital signals; said (N+1) th processing unit having said first input terminal thereof coupled to selectively receive said primary digital signal; said first processing unit including: means for storing a series of K digital values received at said first input terminal; first means for multiplying each of said K digital values received at said first input terminal by its complex conjugate and for summing the products of said multiplications, and means for providing the reciprocal of said sum at said first output terminal and said K stored values in series at said second output terminal; said second through (N+1) th processing units each having: said second input terminal thereof coupled to receive the same signal as said first input terminal of said first processing unit; said third input terminal thereof coupled to said first output terminal of said first processing unit; and said fourth input terminal thereof coupled to said second output terminal of said first processing unit; and including: means for storing each of a series of K digital values received at said first input terminal; first means for multiplying each of said K values received at said first input terminal by the complex conjugate of a corresponding digital value received at said second input terminal and for summing the products of said multiplications to provide an initial sum; second means for multiplying said initial sum by a digital value received at said third input terminal to provide an intermediate product; means for storing intermediate products; third means for multiplying each of a series of K digital values received at said fourth input terminal by said intermediate product; means for subtracting the result of each of said third multiplications from the corresponding one of said K stored values, and for providing the results of said subtractions as a series of values at said first output terminal; and timing and control means coupled to each of said N+1 processing units for controlling the internal operation of and the coupling of signals among said processing units.

Claim 7

In a signal processing system for cancelling from a primary digital electronic signal components of first through N th auxiliary digital signals, when N is an integer greater than two, the improvement wherein said system comprises: N+1 processing units ordered one through N+1; said first processing unit having a first input terminal and first and second output terminals; each of said second through (N+1) th processing units having first through fourth input terminals and a first output terminal; each of said first through N th processing units having said first input terminal thereof coupled to said first output terminal of the next higher order processing unit and to selectively receive, respectively, said first through N th auxiliary digital signals; said (N+1) th processing unit having said first input terminal thereof coupled to selectively receive said primary digital signal; said first processing unit including: means for storing a series of K digital values received at said first input terminal; first means for multiplying each of said K digital values received at said first input terminal by its complex conjugate and for summing the products of said multiplications, and means for providing the reciprocal of said sum at said first output terminal and said K stored values in series at said second output terminal; said second through (N+1) th processing units each having: said second input terminal thereof coupled to receive the same signal as said first input terminal of said first processing unit; said third input terminal thereof coupled to said first output terminal of said first processing unit; and said fourth input terminal thereof coupled to said second output terminal of said first processing unit; and including: means for storing each of a series of K digital values received at said first input terminal; first means for multiplying each of said K values received at said first input terminal by the complex conjugate of a corresponding digital value received at said second input terminal and for summing the products of said multiplications to provide an initial sum; second means for multiplying said initial sum by a digital value received at said third input terminal to provide an intermediate product; means for storing intermediate products; third means for multiplying each of a series of K digital values received at said fourth input terminal by said intermediate product; means for subtracting the result of each of said third multiplications from the corresponding one of said K stored values, and for providing the results of said subtractions as a series of values at said first output terminal; and timing and control means coupled to each of said N+1 processing units for controlling the internal operation of and the coupling of signals among said processing units.

Claim 8

The improved signal processing system recited in claim 4 wherein: each of said means for storing said series of K digital values received at said first input comprises a first-in, first-out memory system.

Claim 9

The improved signal processing system recited in claim 4 wherein: each of said means for storing said intermediate products comprises a first-in, first-out memory system.

Claim 10

The improved signal processing system recited in claim 6 wherein said system is reconfigured with: each of said first through N th processing units coupled to receive a series of digital values from the corresponding auxiliary signal source with said first multiplying means coupled to multiply each received auxiliary signal digital value by its corresponding weight and to provide that product at its first output terminal; and said system further comprises: means for adding the corresponding product from each of said first through N th processing units to the corresponding value from said primary signal source and for providing their sum as an output, said means for adding having an output terminal and N+1 input terminals N of which are coupled to receive a corresponding product from first through N th processing units and the (N+1) th of which is coupled to receive said corresponding value from said primary signal source, said means for adding providing said sum at said output terminal of said adding means, said sum being the weighted sum of one corresponding value from each of said auxiliary digital signals and said primary digital signal, whereby each value at said output terminal comprises one value of said primary signal from which said components of said auxiliary digital signals have been cancelled.

Claim 11

The improved signal processing system recited in claim 4 wherein: each of said second through N th processing units has a second output terminal and means for providing intermediate products at said second output terminal; each of said third through (N+1) th processing units has a fifth input terminal coupled to said second output terminal of the next lower order processor for receiving intermediate products therefrom.

Claim 12

The improved signal processing system recited in claim 8 wherein said system is reconfigured with: each of said second through (N+1) th processing units having one of said input terminals thereof coupled to receive signals from said first output terminals of said lower order processing units; and said first multiplying means coupled to multiply each of a series of values received at said one input terminal of its processing unit by a corresponding stored intermediate value from its processing unit's means for storing intermediate products and to sum the products of those multiplications; and to provide said product sum as a weight at its first output terminal.