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US4758820A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor circuit

Assignee: Canon Inc
•
Filing: 1987-03-23
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Granted: 1988-07-19
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Expires: 2007-03-23
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Abstract

Abstract A semiconductor circuit is provided with a constant current circuit, a resistor network to which a current from the constant current circuit is supplied, and a device between the constant current circuit and the resistor network for switching the current supplied from the constant current circuit to the resistor network.

Inventors

  • 👤 Tetsuya Tateno

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 16:12
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/74; H03M1/78; H03M1/785

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 178 words
A semiconductor circuit comprising: a plurality of resistors each comprising first and second terminals, wherein said first terminals are commonly connected to a power source line; a plurality of first transistors, each comprising first and second main electrodes and a control electrode, wherein each first main electrode is associated with a corresponding one of said plurality of resistors and is connected to said second terminal of its corresponding resistor, and wherein said control electrodes of said plurality of first transistors are commonly connected to a bias line; a plurality of second transistors connected to said second main electrodes of said plurality of first transistors and each comprising a main electrode and a control electrode; a plurality of diodes connected to said second main electrodes of said plurality of first transistors parallel to said plurality of second transistors; a resistor network connected to said main electrode of each of said plurality of second transistors and each of said plurality of diodes; and a digital signal generator connected to said control electrode of each of said plurality of second transistors.
Claim 2
Dependent Claim 178 words
A semiconductor circuit comprising: a plurality of resistors each comprising first and second terminals, wherein said first terminals are commonly connected to a power source line; a plurality of first transistors, each comprising first and second main electrodes and a control electrode, wherein each first main electrode is associated with a corresponding one of said plurality of resistors and is connected to said second terminal of its corresponding resistor, and wherein said control electrodes of said plurality of first transistors are commonly connected to a bias line; a plurality of second transistors connected to said second main electrodes of said plurality of first transistors and each comprising a main electrode and a control electrode; a plurality of diodes connected to said second main electrodes of said plurality of first transistors parallel to said plurality of second transistors; a resistor network connected to said main electrode of each of said plurality of second transistors and each of said plurality of diodes; and a digital signal generator connected to said control electrode of each of said plurality of second transistors.

References Cited (Backward Citations)

US3258765A Cited
US4458201A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-07-19 1992-01-18 1992-07-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-07-19 1996-01-18 1996-07-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-07-19 2000-01-18 2000-07-19 $7700.00 Window Closed / Lapsed

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