US4758783A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compensation network for compensating the frequency response of a spectrum analyzer
Assignee: Rohde and Schwarz GmbH and Co KG
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Filing: 1987-09-28
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Granted: 1988-07-19
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Expires: 2007-09-28
Abstract
Abstract For a fast and accurate frequency response compensation of a spectrum analyzer, the frequency-dependent control values for controlled amplifier are stored as digital values in a digital memory, and in between the memory and a sweep generator of a heterodyne oscillator, an analog-to-digital converter is disposed to provide frequency-proportional digital values of which the associated frequency-dependent control values stored in a memory can be selected and supplied to the controlled amplifier.
Inventors
- 👤 Klaus Danzeisen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 09:09
CPC Classifications
G; G01; G01R; G01R23/00; G01R23/16; G01R23/173
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
207 words
A network for compensating the frequency response of a spectrum analyzer, comprising: a mixer including an input for receiving a high-frequency input signal, a heterodyne signal input, and an output; heterodyne means including a sweep voltage generator and a variable frequency heterodyne oscillator connected to and controlled by the sweep voltage of said sweep voltage generator and connected to said heterodyne input of said mixer; a level varying circuit including an input connected to said output of said mixer, a level control input, and an output for providing a compensated signal; an analog-to-digital converter including an input connected to said sweep voltage generator, and a plurality of outputs; a memory storing frequency-dependent digital control values which are proportional to the sweep voltage, said memory including a plurality of inputs connected to said outputs offset analog-to-digital converter and a plurality of outputs, said frequency-dependent digital control values read from said memory in response to said sweep voltage; and a digital-to-analog converter including a plurality of inputs connected to said plurality of outputs of said memory for converting the digital output thereof into an analog signal, and an output connected to said level control input of said level varying circuit for varying the level of the signal being processed.
Claim 2
Dependent Claim
207 words
A network for compensating the frequency response of a spectrum analyzer, comprising: a mixer including an input for receiving a high-frequency input signal, a heterodyne signal input, and an output; heterodyne means including a sweep voltage generator and a variable frequency heterodyne oscillator connected to and controlled by the sweep voltage of said sweep voltage generator and connected to said heterodyne input of said mixer; a level varying circuit including an input connected to said output of said mixer, a level control input, and an output for providing a compensated signal; an analog-to-digital converter including an input connected to said sweep voltage generator, and a plurality of outputs; a memory storing frequency-dependent digital control values which are proportional to the sweep voltage, said memory including a plurality of inputs connected to said outputs offset analog-to-digital converter and a plurality of outputs, said frequency-dependent digital control values read from said memory in response to said sweep voltage; and a digital-to-analog converter including a plurality of inputs connected to said plurality of outputs of said memory for converting the digital output thereof into an analog signal, and an output connected to said level control input of said level varying circuit for varying the level of the signal being processed.
Claim 3
Dependent Claim
14 words
The network of claim 1, wherein: said level varying circuit comprises a controlled amplifier.
Claim 4
Dependent Claim
39 words
The network of claim 1, wherein: said digital memory includes a plurality of memory locations each storing a control value, the number of control values and memory locations being at least equal to the revolution of said analog-to-digital converter.
Claim 5
Dependent Claim
71 words
The network of claim 1, and further comprising: an input level divider capable of being switched in a plurality of stages, said input level divider including an input, and an output coupled to said input offset mixer, and a plurality of control outputs; said memory further comprising additional storage locations for storing frequency-dependent digital control values and control inputs for those values connected to said control outputs of said level divider.
Claim 6
Dependent Claim
74 words
The network of claim 1, and further comprising: an adder interposed between said digital-to-analog converter and said level varying circuit, said adder including an input connected to said output offset digital-to-analog converter, an output connected to said level control input of said level varying circuit, and an input for receiving a temperature-dependent control value, said adder operable to superpose the temperature-dependent control value on the frequency dependent control value output by said analog-to-digital converter.
Claim 7
Dependent Claim
44 words
The network of claim 1, and further comprising: a demodulator and d.c. voltage amplifier including an input connected to said output of said level varying circuit, and an output; and a level indicator connected to said output of said demodulator and d.c. voltage amplifier.
Claim 8
Dependent Claim
172 words
A network for compensating the frequency response of a spectrum analyzer, comprising: a mixer including an input for receiving a high-frequency input signal, a heterodyne signal input and an output; heterodyne including a sweep voltage generator and a variable frequency heterodyne oscillator connected to and controlled by the sweep voltage of said sweep voltage generator connected to said heterodyne input of said mixer; a level varying circuit including an input connected to said output of said mixer, a level control input, and an output for providing a compensated signal; an analog-to-digital converter including an input connected to said sweep voltage generator and a plurality of outputs; first means storing values each representative of a point along the sweep voltage, said first means connected to said analog-to-digital converter and operated by the output signals thereof to produce first control signals; and second means connected to said first means and connected to said level varying circuit and responsive to said control signals to control the signal level of signals traversing said level varying circuit.
Claim 9
Dependent Claim
172 words
A network for compensating the frequency response of a spectrum analyzer, comprising: a mixer including an input for receiving a high-frequency input signal, a heterodyne signal input and an output; heterodyne including a sweep voltage generator and a variable frequency heterodyne oscillator connected to and controlled by the sweep voltage of said sweep voltage generator connected to said heterodyne input of said mixer; a level varying circuit including an input connected to said output of said mixer, a level control input, and an output for providing a compensated signal; an analog-to-digital converter including an input connected to said sweep voltage generator and a plurality of outputs; first means storing values each representative of a point along the sweep voltage, said first means connected to said analog-to-digital converter and operated by the output signals thereof to produce first control signals; and second means connected to said first means and connected to said level varying circuit and responsive to said control signals to control the signal level of signals traversing said level varying circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-07-19 | 1992-01-18 | 1992-07-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-07-19 | 1996-01-18 | 1996-07-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-07-19 | 2000-01-18 | 2000-07-19 | $7700.00 | Window Closed / Lapsed |