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US4757490A Expired / Lapsed US ⏱️ 0.0 years remaining

Modulation abnormality detector for optical sound-recording system

Assignee: Sony Corp
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Filing: 1984-05-23
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Granted: 1988-07-12
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Expires: 2004-05-23
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Abstract

Abstract In the present invention, there is provided an abnormality detector circuit for comparing a scanning width signal with an upper limit setting signal and a lower limit setting signal and detecting that a scanning width indicated by the scanning width control signal becomes larger than an upper limit scanning width indicated by the upper limit setting signal or becomes smaller than a lower limit scanning width indicated by the lower limit setting signal, whereby when a signal level of an electrical input signal indicative of an information to be recorded exceeds a proper range, this can be positively discriminated by an operator.

Inventors

  • 👤 Hidemichi Shirai
  • 👤 Yoshio Ozaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 16:00
CPC Classifications
G; G11; G11B; G11B27/00; G11B27/36; G11B7/00; G11B7/002; G11B7/003; G11B7/0032; G11B9/00; G11B9/10; G11B7/007

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 329 words
An information recording apparatus in which an exposing beam scans a film, said exposing beam being formed by a scanning width control signal modulated in accordance with an input signal, to form on said film an exposing locus whereby said input signal is recorded on said film, characterized by a modulation abnormality detector circuit which compares said scanning width control signal with an upper limit setting signal and a lower limit setting signal and which detects when a scanning width indicated by said scanning width control signal becomes larger than an upper limit scanning width indicated by said upper limit setting signal or becomes smaller than a lower limit scanning width indicated by said lower limit setting signal and which produces a detection signal indicating a result of the detection, wherein said modulation abnormality detector circuit includes first and second comparator means having respective noninverting inputs connected to said scanning width control signal and respective inverting inputs connected to positive and negative voltage sources for producing an upper limit setting signal and a lower limit setting signal, respectively, and logic circuit means receiving said scanning width control signal modulated in accordance with said input signal and said upper and lower limit setting signals for producing said detection signal, and wherein said logic circuit means includes a first invertor receiving said scanning width control signal modulated in accordance with said input signal, a second invertor receiving said lower limit setting signal from said second comparator means, a first NAND gate receiving said upper limit setting signal from said first comparator means and an output from said first invertor, a second NAND gate receiving said scanning width control signal modulated in accordance with said input signal and an output of said second invertor, and first and second monostable multivibrator circuits connected to be triggered by respective outputs of said first and second NAND gates, the output of said first and second multivibrator circuits being added together to form said detection signal.
Claim 2
Dependent Claim 329 words
An information recording apparatus in which an exposing beam scans a film, said exposing beam being formed by a scanning width control signal modulated in accordance with an input signal, to form on said film an exposing locus whereby said input signal is recorded on said film, characterized by a modulation abnormality detector circuit which compares said scanning width control signal with an upper limit setting signal and a lower limit setting signal and which detects when a scanning width indicated by said scanning width control signal becomes larger than an upper limit scanning width indicated by said upper limit setting signal or becomes smaller than a lower limit scanning width indicated by said lower limit setting signal and which produces a detection signal indicating a result of the detection, wherein said modulation abnormality detector circuit includes first and second comparator means having respective noninverting inputs connected to said scanning width control signal and respective inverting inputs connected to positive and negative voltage sources for producing an upper limit setting signal and a lower limit setting signal, respectively, and logic circuit means receiving said scanning width control signal modulated in accordance with said input signal and said upper and lower limit setting signals for producing said detection signal, and wherein said logic circuit means includes a first invertor receiving said scanning width control signal modulated in accordance with said input signal, a second invertor receiving said lower limit setting signal from said second comparator means, a first NAND gate receiving said upper limit setting signal from said first comparator means and an output from said first invertor, a second NAND gate receiving said scanning width control signal modulated in accordance with said input signal and an output of said second invertor, and first and second monostable multivibrator circuits connected to be triggered by respective outputs of said first and second NAND gates, the output of said first and second multivibrator circuits being added together to form said detection signal.
Claim 3
Dependent Claim 45 words
An information recording apparatus according to claim 1, further comprising indicator means responsive to said detection signal from said modulation abnormality detector circuit for producing an indication when said scanning width control signal is larger than said upper limit and smaller than said lower limit.
Claim 4
Dependent Claim 16 words
An information recording apparatus according to claim 2, wherein said indicator means comprises a visual indicator.
Claim 5
Dependent Claim 17 words
An information recording apparatus according to claim 3, wherein said visual indicator comprises a light emitting diode.

References Cited (Backward Citations)

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JPS4990515A Cited
US4076969A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-07-12 1992-01-11 1992-07-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-07-12 1996-01-11 1996-07-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-07-12 2000-01-11 2000-07-12 $7700.00 Window Closed / Lapsed

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