Thin film static induction transistor and method for manufacturing the same

Claim 1

A thin film static induction transistor comprising: an insulating substrate; a first semiconductor layer of first conductivity type which is deposited on said insulating substrate and used as a drain region connected to a drain electrode; a second semiconductor layer which comprises first regions each having a top surface of a first positional level and second regions each having a top surface of a second positional level lower than said first positional level and is used as a channel region, said first region having side surfaces corresponding to the difference between said first and second positional levels; a third semiconductor layer of said first conductivity type which is formed on said top surface of said first region of said second semiconductor layer and used as a source region connected to a source electrode; a fourth semiconductor layer provided on the inner surface of a recess which is defined by mutually facing side surfaces of adjacent two of said first regions, mutually facing side surfaces of said third semiconductor layer on said adjacent two of said first regions, and said top surface of said second region between said adjacent two of said first regions; and gate electrodes deposited on said fourth semiconductor layer; wherein said first to fourth semiconductor layers are made of amorphous silicon; said second semiconductor has the impurity concentration of said first conductivity type which indicates the highest level at the location which contacts said third semiconductor layer and stepwise decreases in the direction of the thickness of said second semiconductor layer; and said fourth semiconductor layer is made of one of intrinsic amorphous silicon and amorphous silicon of said first conductivity type doped to a concentration lower than that of said location of said second semiconductor layer contacting said third semiconductor layer.