Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
380 words
A circuit arrangement for telecommunication switching systems, including exchanges, in which at least one sub-exchange is connected to a central control exchange via the seizable connecting channels of a two channel system which are independent of each other, and in which a given number of said connecting channels belong to two separate transmission systems which, respectively, are provided with a common transmission medium per system and two common terminals per system, and in which one of the channels of each of the two transmission systems is used as a control signal, and in which subscriber line circuits of subscriber lines are connected to the sub-exchange and are cyclically selected by each of two independently operating processors, said processors being provided in the subexchange and assigned to one of the two transmission systems, and are scanned for switching codes received via the subscriber line, which include one or more codes including, initial codes indicating the start of an intended connection which is to be established, as well as selection codes, special codes, and release codes, and in which the processors, in the event of a malfunction of their respective transmission systems, adopt an emergency operating mode which differs from the standard operating mode, characterized in that the subexchange processors, when experiencing malfunctions, adopt a third or an out-of-order mode which differs from the standard operating mode as well as the emergency operating mode; that each of the subexchange processors respectively signals a state signal indicating its operating mode to each subscriber line circuit when selecting subscriber line circuits; that the subscriber line circuits store the operating mode of each of the subexchange processors; and that the subscriber line circuits present their switching codes to each of the two sub-exchange processors when both processors are in a standard operating mode or when both processors are in an emergency operating mode, the subscriber line circuits presenting their codes only to that processor which is in a standard operating mode, when one of the two processors is in a standard operating mode and the other in an emergency operating mode, and presenting their switching codes only to the processor which is in an emergency operating mode, when one of the two processors is in standard operating mode and the other in an out-of-order state.
Claim 2
Dependent Claim
380 words
A circuit arrangement for telecommunication switching systems, including exchanges, in which at least one sub-exchange is connected to a central control exchange via the seizable connecting channels of a two channel system which are independent of each other, and in which a given number of said connecting channels belong to two separate transmission systems which, respectively, are provided with a common transmission medium per system and two common terminals per system, and in which one of the channels of each of the two transmission systems is used as a control signal, and in which subscriber line circuits of subscriber lines are connected to the sub-exchange and are cyclically selected by each of two independently operating processors, said processors being provided in the subexchange and assigned to one of the two transmission systems, and are scanned for switching codes received via the subscriber line, which include one or more codes including, initial codes indicating the start of an intended connection which is to be established, as well as selection codes, special codes, and release codes, and in which the processors, in the event of a malfunction of their respective transmission systems, adopt an emergency operating mode which differs from the standard operating mode, characterized in that the subexchange processors, when experiencing malfunctions, adopt a third or an out-of-order mode which differs from the standard operating mode as well as the emergency operating mode; that each of the subexchange processors respectively signals a state signal indicating its operating mode to each subscriber line circuit when selecting subscriber line circuits; that the subscriber line circuits store the operating mode of each of the subexchange processors; and that the subscriber line circuits present their switching codes to each of the two sub-exchange processors when both processors are in a standard operating mode or when both processors are in an emergency operating mode, the subscriber line circuits presenting their codes only to that processor which is in a standard operating mode, when one of the two processors is in a standard operating mode and the other in an emergency operating mode, and presenting their switching codes only to the processor which is in an emergency operating mode, when one of the two processors is in standard operating mode and the other in an out-of-order state.
Claim 3
Dependent Claim
77 words
A circuit arrangement as defined in claim 1 further characterized in that the subscriber line circuits are combined into multiple subscriber line circuits, each of which is provided with its own module processor which collects the switching codes of the subscriber line circuits belonging to a multiple subscriber line circuit; and that the module processors are selected individually and in succession, and, at the time of selection, transmit the switching codes collected by the subscriber line circuits.
Claim 4
Dependent Claim
39 words
A circuit arrangement as defined in claim 1 further characterized in that suitable storage media for storing the operating state of the subexchange processors are provided jointly for the subscriber line circuits contained in a multiple subscriber line circuit.
Claim 5
Dependent Claim
105 words
A circuit arrangement as defined in claim 1 further characterized in that the subscriber line circuits or module processors only present the initial codes to each of the two subexchange processors when both processors are in a standard operating mode or when both processors are in an emergency operating mode; that after an initial code has been transmitted from a subscriber line circuit to a subexchange processor, said initial code is stored in the processor which received said initial code, and that, on the basis of said storage, all other switching codes received from said subscriber line circuit are presented to the same processor only.