US4754279A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Scan converter for radar
Assignee: Barco Folsom Research Inc
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Filing: 1986-08-04
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Granted: 1988-06-28
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Expires: 2006-08-04
Abstract
Abstract In a scan converter for converting polar-coordinate radar data into a standard video display scanned at a 100 ns per pixel rate, the reading of sixteen x-y pixels into the video buffer, writing of two polar pixels into the x-y memory, and fading of four x-y pixels in the x-y memory can all be accomplished in a single 1600 ns time slot by using a nibble mode of addressing with an x-y memory made up of four standard 64K chips operable in parallel. In another aspect of the invention, radar data can be written into the x-y memory of a scan converter at double that rate without affecting the read or fade capabilities by configuring the x-y memory chips in such a manner that a given address on the memory chips represents a group of adjacent pixels of one line of the display and a corresponding group of pixels of the next adjacent line of the display.
Inventors
- 👤 Robert W. Cribbs
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 11:36
CPC Classifications
G; G01; G01S; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/295; G01S7/298
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
134 words
A method of operating a polar format to video format scan converter so as to permit the writing of at least two polar-coordinate pixels in an x-y format, the fading of at least four pixels, and the reading of at least sixteen pixels into a video buffer during the time required for an operational cycle, comprising the steps of: (a) organizing the x-y memory of said scan converter in such a manner as to allow the parallel readout of at least four pixels; (b) reading four successive groups of at least four parallel pixels from a single address by using the nibble mode of reading said x-y memory; (c) fading at least four pixels in parallel; and (d) successively writing at least two polar coordinate pixels into said x-y memory at separately addressed locations.
Claim 2
Independent Claim
134 words
A method of operating a polar format to video format scan converter so as to permit the writing of at least two polar-coordinate pixels in an x-y format, the fading of at least four pixels, and the reading of at least sixteen pixels into a video buffer during the time required for an operational cycle, comprising the steps of: (a) organizing the x-y memory of said scan converter in such a manner as to allow the parallel readout of at least four pixels; (b) reading four successive groups of at least four parallel pixels from a single address by using the nibble mode of reading said x-y memory; (c) fading at least four pixels in parallel; and (d) successively writing at least two polar coordinate pixels into said x-y memory at separately addressed locations.
Claim 3
Independent Claim
164 words
A method of operating a polar format to video format scan converter so as to permit the writing of at least four polar-coordinate pixels in an x-y format, the fading of at least four pixels, and the reading of at least sixteen pixels into a video buffer during the time required for an operational cycle, comprising the steps of: (a) organizing the x-y memory of said scan converter in such a manner that sets of horizontally adjacent pixels and the corresponding pixels vertically adjacent thereto are stored on separate chips readable in parallel; (b) reading four successive groups of at least two of said parallel-readable pixels from a single address by using a fast mode of reading said x-y memory; (c) fading at least two parallel-readable pixels of one of said groups during the reading of said groups; (d) simultaneously writing at least two contiguous polar-coordinate pixels into said x-y memory immediately following said reading; and (e) repeating said reading, fading, and writing steps.
Claim 4
Independent Claim
164 words
A method of operating a polar format to video format scan converter so as to permit the writing of at least four polar-coordinate pixels in an x-y format, the fading of at least four pixels, and the reading of at least sixteen pixels into a video buffer during the time required for an operational cycle, comprising the steps of: (a) organizing the x-y memory of said scan converter in such a manner that sets of horizontally adjacent pixels and the corresponding pixels vertically adjacent thereto are stored on separate chips readable in parallel; (b) reading four successive groups of at least two of said parallel-readable pixels from a single address by using a fast mode of reading said x-y memory; (c) fading at least two parallel-readable pixels of one of said groups during the reading of said groups; (d) simultaneously writing at least two contiguous polar-coordinate pixels into said x-y memory immediately following said reading; and (e) repeating said reading, fading, and writing steps.
Claim 5
Dependent Claim
28 words
The method of claim 2, in which said fading step is performed on pixels of successively different ones of said groups in successive frames of the video scan.
Claim 6
Dependent Claim
78 words
In an x-y memory for polar format to video format scan converters having a linearly scanned display, where said memory is composed of a plurality of memory chips in which data can be simultaneously written or read, the improvement comprising: configuring said memory so that the same simultaneously addressed memory locations in said chips represent, respectively, adjacent pixels in one line of said display, and the horizontaly same pixels in at least one adjacent line of said display.
Claim 7
Dependent Claim
78 words
In an x-y memory for polar format to video format scan converters having a linearly scanned display, where said memory is composed of a plurality of memory chips in which data can be simultaneously written or read, the improvement comprising: configuring said memory so that the same simultaneously addressed memory locations in said chips represent, respectively, adjacent pixels in one line of said display, and the horizontaly same pixels in at least one adjacent line of said display.
Claim 8
Dependent Claim
42 words
The improvement of claim 1, in which there are four memory chips, two of said chips representing groups of two adjacent pixels in odd-numbered lines, and the other two chips representing the same groups of two adjacent pixels in adjacent even-numbered lines.
References Cited (Backward Citations)
US4568941A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-06-28 | 1991-12-28 | 1992-06-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-06-28 | 1995-12-28 | 1996-06-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-06-28 | 1999-12-28 | 2000-06-28 | $7700.00 | Window Closed / Lapsed |