US4754258A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated digital circuit for processing speech signal
Assignee: Toshiba Corp
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Filing: 1987-05-18
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Granted: 1988-06-28
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Expires: 2007-05-18
Abstract
Abstract In an integrated circuit for transcoder, a substractor generates a signal representing a difference between an input speech signal and a prediction signal. This signal is transferred to a quantizing unit. The unit quantizes an output signal from the subtractor, and generates a predictive encoded signal. An inverse quantizing unit generates a difference signal. A predictor filter generates the prediction signal to be supplied to the subtractor. A signal path changing unit made up of electronic switches respondes to a mode select signal to suitably change an electric connection among the subtractor, the quantizing unit and the reverse quantizing unit, whereby the integrated circuit device can function as and ADPCM encoder or an ADPCM decoder.
Inventors
- 👤 Makoto Nakamura
- 👤 Hideo Suzuki
- 👤 Toshihiko Kuroki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 06:03
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/3002; H03M7/3044; H03M7/3046; H04; H04M; H04M3/00; H04M3/42; H04M3/56; H04M3/561; H04M3/568
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
181 words
A integrated circuit device which is applied for a digital communication system and has an input terminal and an output terminal, said device comprising: (a) decoding means for receiving an ADPCM data signal supplied through the input terminal and converting the ADPCM data signal into a first linear PCM data signal; (b) a first external connection terminal for receiving and outputing the first linear PCM data signal; (c) a second external connection terminal for receiving a second linear PCM data signal input to said integrated circuit device; (d) a third external connection terminal for receiving a switch control signal input to said integrated circuit device; (e) switch means for receiving the first and second linear PCM data signals at first and second inputs of said switch means per se, and for performing a switching operation to generate only one of the first and second linear PCM data signals in response to the switch control signal; and (f) signal converting means connected to said switch means, for converting the output signal supplied to said switch means into a nonlinear PCM data signal.
Claim 2
Dependent Claim
181 words
A integrated circuit device which is applied for a digital communication system and has an input terminal and an output terminal, said device comprising: (a) decoding means for receiving an ADPCM data signal supplied through the input terminal and converting the ADPCM data signal into a first linear PCM data signal; (b) a first external connection terminal for receiving and outputing the first linear PCM data signal; (c) a second external connection terminal for receiving a second linear PCM data signal input to said integrated circuit device; (d) a third external connection terminal for receiving a switch control signal input to said integrated circuit device; (e) switch means for receiving the first and second linear PCM data signals at first and second inputs of said switch means per se, and for performing a switching operation to generate only one of the first and second linear PCM data signals in response to the switch control signal; and (f) signal converting means connected to said switch means, for converting the output signal supplied to said switch means into a nonlinear PCM data signal.
Claim 3
Dependent Claim
71 words
The integrated circuit according to claim 1, wherein, when said first external connection terminal is connected to an adder unit, an output signal from the adder unit is supplied through said second external connection terminal of said integrated circuit device to said second input of said switching means, and said switch means transfers the signal transferred to the second input of said switch means per se to said signal coverting means.
Claim 4
Dependent Claim
64 words
The integrated circuit device according to claim 2, wherein said integrated circuit device further comprises: a synchronous coding circuit connected to said signal converting means and said output terminal, said synchronous coding circuit having a control terminal directly connected to said third external connection terminal, whereby said synchronous coding circuit may be controlled by a control signal supplied to said third external connection terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-06-28 | 1991-12-28 | 1992-06-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-06-28 | 1995-12-28 | 1996-06-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-06-28 | 1999-12-28 | 2000-06-28 | $7700.00 | Window Closed / Lapsed |