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US4752904A Expired / Lapsed US ⏱️ 0.0 years remaining

Efficient structure for computing mixed-radix projections from residue number systems

Assignee: International Business Machines Corp
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Filing: 1986-07-28
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Granted: 1988-06-21
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Expires: 2006-07-28
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Abstract

Abstract Apparatus for providing mixed-radix projection data from residue number systems data, while providing error detection and correction. A single array of ROMs and lacthes is provided, comprising the combination of each of N conventional MRC structures of size N-1, wherein the signal paths, latches and ROMs that are duplicative as between said structures are merged to eliminate the duplication.

Inventors

  • 👤 David F. Paul

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 06:46
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/14; H03M7/18; G; G06; G06F; G06F11/00; G06F11/07; G06F11/16; G06F7/00; G06F7/60; G06F7/72; G06F7/729

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 267 words
Apparatus for converting input data signals represented in a redundant residue number system having N moduli, to output mixed-radix projection data signals from which error detection and correction information can be derived, comprising: a set of N-1 arrays, S i , where i-1 through N-1, each array S i comprising an MRC structure of size N=i+1, except for S 1 which comprises an MRC structure of size N but without the N-1 th stage, the output thereof being provided after stage N-2; each said array S i having at array positions for which i>j a ROMij, and having at all other array positions therein a latch, wherein said ROMij performs the operation r=[((p-1)mj.sup.-1)]((p-q)m.sub.j.sup.-1)modulo m.sub.i where m j -1 is an integer such that (m j -1 ×m j ) modulo m j =1, r is the output, p is the higher order input and q is the other input of said ROMij, on the input data signals thereto, and wherein the ROMij which occupies column x, stage y of S z is determined by i=x+z-1 and j=y+z-1; wherein the inputs to said S 1 array are k 1 through k N and the outputs thereof are N mixed radix digits, S 1 (1) through S 1 (N); and wherein the inputs to all other S i arrays are the N-i+1 p-inputs of Stage i-1 of S 1 , and the outputs thereof are mixed radix digits S i (i) through S i (N) whereby the mixed-radix representation of each of the N projections of the input residue number are available for subsequent identification of erroneous residue digits.
Claim 2
Dependent Claim 267 words
Apparatus for converting input data signals represented in a redundant residue number system having N moduli, to output mixed-radix projection data signals from which error detection and correction information can be derived, comprising: a set of N-1 arrays, S i , where i-1 through N-1, each array S i comprising an MRC structure of size N=i+1, except for S 1 which comprises an MRC structure of size N but without the N-1 th stage, the output thereof being provided after stage N-2; each said array S i having at array positions for which i>j a ROMij, and having at all other array positions therein a latch, wherein said ROMij performs the operation r=[((p-1)mj.sup.-1)]((p-q)m.sub.j.sup.-1)modulo m.sub.i where m j -1 is an integer such that (m j -1 ×m j ) modulo m j =1, r is the output, p is the higher order input and q is the other input of said ROMij, on the input data signals thereto, and wherein the ROMij which occupies column x, stage y of S z is determined by i=x+z-1 and j=y+z-1; wherein the inputs to said S 1 array are k 1 through k N and the outputs thereof are N mixed radix digits, S 1 (1) through S 1 (N); and wherein the inputs to all other S i arrays are the N-i+1 p-inputs of Stage i-1 of S 1 , and the outputs thereof are mixed radix digits S i (i) through S i (N) whereby the mixed-radix representation of each of the N projections of the input residue number are available for subsequent identification of erroneous residue digits.

References Cited (Backward Citations)

US4107783A Cited
US4281391A Cited
US4458327A Cited
US4418394A Cited
US4537502A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-06-21 1991-12-21 1992-06-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-06-21 1995-12-21 1996-06-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-06-21 1999-12-21 2000-06-21 $7700.00 Window Closed / Lapsed

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