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US4751126A Expired / Lapsed US ⏱️ 0.0 years remaining

A method of making a circuit board and a circuit board produced thereby

Assignee: Toshiba Corp
•
Filing: 1986-07-02
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Granted: 1988-06-14
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Expires: 2006-07-02
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Abstract

Abstract A circuit board is prepared such that at least two resin substrates are laminated and bonded by thermocompression, a circuit pattern made of a resin composition containing a conductor material is formed on at least one of opposing surfaces of the substrates, a region of the substrate which corresponds to a specific portion of the circuit pattern is recessed, the specific portion of the circuit projects into the recess in accordance with plastic deformation of the substrates and the circuit pattern which is caused by thermocompression bonding, and the specific portion of the circuit pattern constitutes an exposed portion. Multilayer or three-dimensional wiring can be easily achieved in the circuit board.

Inventors

  • 👤 Hirosi Oodaira
  • 👤 Yoshikatsu Fukumoto
  • 👤 Shuji Hiranuma
  • 👤 Masayuki Ohuchi
  • 👤 Tamio Saito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 13:15
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/18; H05K1/182; H05K1/185; H05K1/186; H05K3/00; H05K3/22; H05K3/28; H05K3/281; H05K3/40; H05K3/4038; H05K3/4084; H05K3/46; H05K3/4611; H05K3/4614; H05K3/4626; H05K3/4632; H05K1/02; H05K1/09; H05K1/092; H05K1/095; H05K2201/00; H05K2201/01; H05K2201/0104; H05K2201/0129; H05K2201/09; H05K2201/09009; H05K2201/091; H05K2203/00; H05K2203/06; H05K2203/063; H05K2203/15; H05K2203/1572; H05K2203/30; H05K2203/302; H05K3/0011; H05K3/0014; H05K3/4007; Y; Y10; Y10S; Y10S428/00; Y10S428/901; Y10T; Y10T156/00; Y10T156/10; Y10T156/1052; Y10T156/1056; Y10T156/1089; Y10T156/109; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/4913; Y10T29/49155; Y10T29/49165; Y10T29/49167; Y10T428/00; Y10T428/24; Y10T428/24273; Y10T428/24322; Y10T428/24331; Y10T428/24339; Y10T428/24347

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 157 words
A method of manufacturing a circuit board, comprising the steps of: (a) laminating a plurality of resin substrates with at least one circuit pattern of a conductive resin composition interposed between said resin substrates to form a laminated composite, at least one of said resin substrates which constitutes an outermost layer of said laminated composite being provided with at least one through hole, said circuit pattern disposed adjacent said through hole and said resin substrates as well as said conductive resin composition having substantially the same softening point; and (b) thermally compressing thicknesswise said laminated composite at the softening point thereof to bond said resin substrates together and to plastically deform the circuit pattern thereby to allow a portion of said circuit pattern to be exposed through said through hole such that a surface of the exposed portion is flush with an exposed surface of the at least one of said resin substrates constituting said outermost layer.
Claim 2
Independent Claim 157 words
A method of manufacturing a circuit board, comprising the steps of: (a) laminating a plurality of resin substrates with at least one circuit pattern of a conductive resin composition interposed between said resin substrates to form a laminated composite, at least one of said resin substrates which constitutes an outermost layer of said laminated composite being provided with at least one through hole, said circuit pattern disposed adjacent said through hole and said resin substrates as well as said conductive resin composition having substantially the same softening point; and (b) thermally compressing thicknesswise said laminated composite at the softening point thereof to bond said resin substrates together and to plastically deform the circuit pattern thereby to allow a portion of said circuit pattern to be exposed through said through hole such that a surface of the exposed portion is flush with an exposed surface of the at least one of said resin substrates constituting said outermost layer.
Claim 3
Dependent Claim 29 words
A method according to claim 1, wherein said laminating step (a) comprises: disposing a circuit element between said resin substrates to connect said circuit element to said circuit pattern.
Claim 4
Dependent Claim 95 words
A method according to claim 1, wherein said step (a) comprises laminating three substrates including an intermediate substrate also having a through hole, and upper and lower substrates sandwiching the intermediate substrate and at least two of said circuit patterns respectively disposed between said intermediate substrate and said upper substrate, and between said intermediate substrate and said lower substrate; and in step (b) said circuit patterns disposed between said intermediate substrate and said upper substrate being plastically deformed to come in contact and to be bonded together through said through hole in said intermediate substrate.
Claim 5
Dependent Claim 23 words
A method according to claim 1, wherein a resin constituting the substrates and a resin constituting the resin composition comprise thermoplastic resins, respectively.
Claim 6
Dependent Claim 40 words
A method according to claim 1, wherein a resin constituting the substrates and a resin constituting the resin composition comprise thermosetting resins, respectively, the thermosetting resins being subjected to a crosslinking reaction and cured by heat, a catalyst or radiation.
Claim 7
Dependent Claim 11 words
A circuit board produced by the method recited in claim 1.
Claim 8
Dependent Claim 11 words
A circuit board produced by the method recited in claim 2.
Claim 9
Dependent Claim 11 words
A circuit board produced by the method recited in claim 3.
Claim 10
Dependent Claim 11 words
A circuit board produced by the method recited in claim 4.
Claim 11
Dependent Claim 11 words
A circuit board produced by the method recited in claim 5.

References Cited (Backward Citations)

US2683839A Cited
US2958120A Cited
US3010863A Cited
US3135823A Cited
US3501832A Cited
US3431350A Cited
US3680209A Cited
US3670205A Cited
US4377652A Cited
US4394710A Cited
US4517050A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-06-14 1991-12-14 1992-06-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-06-14 1995-12-14 1996-06-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-06-14 1999-12-14 2000-06-14 $7700.00 Window Closed / Lapsed

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