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US4744094A Expired / Lapsed US ⏱️ 0.0 years remaining

BPSK demodulator with D type flip/flop

Assignee: Zenith Electronics LLC
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Filing: 1986-12-12
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Granted: 1988-05-10
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Expires: 2006-12-12
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Abstract

Abstract A BPSK demodulator includes a D type flip-flop having a clock terminal supplied with the output of a phase locked loop (PLL). The ouput of the D flip-flop and the carrier are provided as inputs to an exclusive OR gate, the output of which is used to lock up the PLL. The VCO in the PLL is phase displaced 90° with respect to the carrier such that the carrier is sampled to detect the data.

Inventors

  • 👤 Daniel S. McCarren

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 21:44
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2272; Y; Y10; Y10S; Y10S331/00; Y10S331/02

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 75 words
A BPSK demodulator comprising: means receiving a carrier modulated with data in BPSK form; a PLL source of clock signal that is 90° displaced with respect to said carrier; demodulation means comprising a D flip-flop having one input for receiving said carrier, another input for receiving said clock signal and an output for producing said data; and gate means supplied with said data and with said carrier for supplying a locking signal to said PLL.
Claim 2
Dependent Claim 75 words
A BPSK demodulator comprising: means receiving a carrier modulated with data in BPSK form; a PLL source of clock signal that is 90° displaced with respect to said carrier; demodulation means comprising a D flip-flop having one input for receiving said carrier, another input for receiving said clock signal and an output for producing said data; and gate means supplied with said data and with said carrier for supplying a locking signal to said PLL.
Claim 3
Dependent Claim 29 words
The demodulator of claim 1, wherein said gate means includes an exclusive OR gate receiving inputs of said carrier and said data and supplying an output to said PLL.
Claim 4
Dependent Claim 31 words
The demodulator of claim 2, further including a lock detector having inputs supplied by said exclusive OR gate and said PLL and being coupled to control operation of said D flip-flop.
Claim 5
Dependent Claim 75 words
A BPSK demodulator comprising: means receiving a carrier modulated with data in BPSK form; a PLL source of clock signal that is 90° phase displaced with respect to said carrier; a demodulator including a D flip-flop having one input receiving said carrier, another input receiving said clock signal and an output producing said data; and an exclusive OR gate supplied with said data and with said carrier for supplying a locking signal to said PLL.
Claim 6
Dependent Claim 75 words
A BPSK demodulator comprising: means receiving a carrier modulated with data in BPSK form; a PLL source of clock signal that is 90° phase displaced with respect to said carrier; a demodulator including a D flip-flop having one input receiving said carrier, another input receiving said clock signal and an output producing said data; and an exclusive OR gate supplied with said data and with said carrier for supplying a locking signal to said PLL.
Claim 7
Dependent Claim 31 words
The demodulator of claim 4, further including a lock detector having inputs supplied by said exclusive OR gate and said PLL and being coupled to control operation of said D flip-flop.

References Cited (Backward Citations)

US3312901A Cited
US3908115A Cited
US4222009A Cited
US4380815A Cited
US4575684A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-05-10 1991-11-09 1992-05-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-05-10 1995-11-09 1996-05-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-05-10 1999-11-09 2000-05-10 $7700.00 Window Closed / Lapsed

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