Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
185 words
A switched capacitor circuit provided with an input signal terminal and an output signal terminal which comprises: first and second switches connected in series between said input signal terminal and a first fixed potential terminal and third and fourth switches connected in series between said output signal terminal and said first fixed potential terminal, said first switch being controlled by a first clock pulse having a first phase, said second switch being controlled by a second clock pulse having a second phase reversed from said first phase, said third switch being controlled by one of said first and second clock pulses, and said fourth switch being controlled by the other of said first and second clock pulses; a capacitor circuit including at least two serial capacitors connected between the junction of said first and second switches and the junction of said third and fourth switches and at least one parallel capacitor connected between the junction of said two serial capacitors and said first fixed potential terminal; and highly resistive element means connected between the junction of said two serial capacitors and a second fixed terminal.
Claim 2
Dependent Claim
185 words
A switched capacitor circuit provided with an input signal terminal and an output signal terminal which comprises: first and second switches connected in series between said input signal terminal and a first fixed potential terminal and third and fourth switches connected in series between said output signal terminal and said first fixed potential terminal, said first switch being controlled by a first clock pulse having a first phase, said second switch being controlled by a second clock pulse having a second phase reversed from said first phase, said third switch being controlled by one of said first and second clock pulses, and said fourth switch being controlled by the other of said first and second clock pulses; a capacitor circuit including at least two serial capacitors connected between the junction of said first and second switches and the junction of said third and fourth switches and at least one parallel capacitor connected between the junction of said two serial capacitors and said first fixed potential terminal; and highly resistive element means connected between the junction of said two serial capacitors and a second fixed terminal.
Claim 3
Dependent Claim
19 words
A switched capacitor circuit according to claim 1, wherein said highly resistive element means comprises a pn junction diode.
Claim 4
Dependent Claim
51 words
A switched capacitor circuit according to claim 1, wherein said highly resistive element means comprises a first highly resistive element connected between the junction of said two serial capacitors and said second fixed potential terminal and a second highly resistive element connected between said junction and a third fixed potential terminal.
Claim 5
Dependent Claim
22 words
A switched capacitor circuit according to claim 3, wherein said second fixed potential and third fixed potential have different levels and polarities.
Claim 6
Dependent Claim
134 words
A switched capacitor circuit according to claim 1, wherein said capacitor circuit includes first to third serial capacitors connected between the junction of said first and second switches and the junction of said third and fourth switches, a first parallel capacitor connected between the junction of said first and second serially connected capacitors and said first fixed potential terminal, and a second parallel capacitor connected between the junction of said second and third serially connected capacitors and said first fixed potential terminal; and said highly resistive element means includes a highly resistive element connected between the junction of said first and second serially connected capacitors and a second fixed potential terminal and another highly resistive element connected between the junction of said second and third serially connected capacitors and a third fixed potential terminal.