Compensation circuitry for dual port phase-locked loops

Claim 2

A dual port phase-locked loop including a phase detector having an output terminal, a phase modulation summing circuit having a first input terminal for receiving phase modulation, a second input terminal and an output terminal, a frequency modulation summing circuit having an input terminal for receiving frequency modulation and an output terminal, a voltage controlled oscillator circuit having a control terminal and a divide-by-N circuit providing a changeable divider ratio, wherein the improvement comprises: phase port gain compensator means having input, control and output terminals, said input terminal of said phase port gain compensator means being coupled to the output terminal of the phase detector, said output terminal of said phase port gain compensator means being coupled to the second input terminal of the phase modulation summing circuit; compensator control means having a control terminal and at least one output terminal, said output terminal of said compensator control means being coupled to said control terminal of said phase port gain compensator means; and conductive means coupled to said control terminal of said compensator control means for providing first control signals thereto, said compensator control means being responsive to said first control signals to provide second control signals to said phase port gain compensator means which responds to said second control signals to compensate the phase-locked loop for undesirable changes therein otherwise caused by changes in the divider ratio.

Claim 3

The dual port phase-locked loop of claim 1 wherein said phase port gain compensator means includes a plurality of circuit legs each having a circuit element and an electronically controlled switch means, said circuit element and said electronically controlled switch means being coupled together.

Claim 4

The dual port phase-locked loop circuit of claim 2 wherein said phase port gain compensator means further includes amplifier means having input and output terminals, each of said circuit legs being coupled between said input terminal of said phase port gain compensator means and said input terminal of said amplifier means, said output terminal of said amplifier means being coupled to the second input terminal of the phase modulation summing circuit, said electronically controlled switch means being responsive to said second control signals from said compensator control means to selectively couple various ones of said circuit elements to said amplifier means to compensate for otherwise undesirable effects caused by changes in the divider ratio.

Claim 5

The dual port phase-locked loop of claim 1 further including: voltage controlled oscillator gain compensator means having input, output and control terminals, said input terminal of said voltage controlled gain compensator means being coupled to the output terminal of the frequency modulation summing circuit, and said output terminal of said voltage controlled oscillator gain compensator means being coupled to the control terminal of the voltage controlled oscillator; and an output terminal of said compensator control means being coupled to said control terminal of said voltage controlled oscillator gain compensator means, and said compensator control means providing control signals to said voltage controlled oscillator gain compensator means which responds to said control signals to compensate the phase-locked loop for otherwise undesirable changes therein.

Claim 6

The dual port phase-locked loop of claim 4 wherein said control terminal of said voltage controlled gain compensator means receives said second control signals from said compensator control means.

Claim 7

A dual port phase-locked loop including a phase detector having an output terminal, a phase modulation summing circuit having a first input terminal for receiving phase modulation, a second input terminal and an output terminal, a frequency modulation summing circuit having an input terminal for receiving frequency modulation an output terminal, a voltage controlled oscillator circuit having a control terminal and a divide-by-N circuit providing a changeable divider ratio, wherein the improvement comprises: phase port gain compensator means having an input terminal, a control terminal and an output terminal, said input terminal of said phase port gain compensator means being coupled to the output terminal of the phase detector, said output terminal of said phase port gain compensator means being coupled to the second input terminal of the phase modulation summing circuit; voltage controlled oscillator gain compensator means having an input terminal, an output terminal and a control terminal, said input terminal of said voltage controlled gain compensator means being coupled to the output terminal of the frequency modulation summing circuit, and said output terminal of said voltage controlled oscillator gain compensator means being coupled to the control terminal of the voltage controlled oscillator; compensator control means having a control terminal, a first output terminal, and a second output terminal, said first output terminal of said compensator control means being coupled to said control terminal of said phase port gain compensator means, said second output terminal of said compensator control means being coupled to said control terminal of said voltage controlled oscillator gain compensator means; and conductive means coupled to said control terminal of said compensator control means for providing first control signals thereto, said compensator control means being responsive to said first control signals to provide second control signals to said phase port gain compensator which responds to said second control signals to compensate the phase-locked loop for undesirable changes therein otherwise caused by changes in the divider ratio, and said compensator control means being responsive to said first control signals to provide third control signals to said voltage controlled oscillator gain compensator means which responds to said third control signals to compensate the phase-locked loop for otherwise undesirable changes therein caused by the voltage controlled oscillator.

Claim 8

A dual port phase-locked loop including a phase detector having an output terminal, a phase modulation summing circuit having a first input terminal for receiving phase modulation, a second input terminal and an output terminal, a frequency modulation summing circuit having an input terminal for receiving frequency modulation an output terminal, a voltage controlled oscillator circuit having a control terminal and a divide-by-N circuit providing a changeable divider ratio, wherein the improvement comprises: phase port gain compensator means having an input terminal, a control terminal and an output terminal, said input terminal of said phase port gain compensator means being coupled to the output terminal of the phase detector, said output terminal of said phase port gain compensator means being coupled to the second input terminal of the phase modulation summing circuit; voltage controlled oscillator gain compensator means having an input terminal, an output terminal and a control terminal, said input terminal of said voltage controlled gain compensator means being coupled to the output terminal of the frequency modulation summing circuit, and said output terminal of said voltage controlled oscillator gain compensator means being coupled to the control terminal of the voltage controlled oscillator; compensator control means having a control terminal, a first output terminal, and a second output terminal, said first output terminal of said compensator control means being coupled to said control terminal of said phase port gain compensator means, said second output terminal of said compensator control means being coupled to said control terminal of said voltage controlled oscillator gain compensator means; and conductive means coupled to said control terminal of said compensator control means for providing first control signals thereto, said compensator control means being responsive to said first control signals to provide second control signals to said phase port gain compensator which responds to said second control signals to compensate the phase-locked loop for undesirable changes therein otherwise caused by changes in the divider ratio, and said compensator control means being responsive to said first control signals to provide third control signals to said voltage controlled oscillator gain compensator means which responds to said third control signals to compensate the phase-locked loop for otherwise undesirable changes therein caused by the voltage controlled oscillator.

Claim 9

The dual port phase-locked loop of claim 6 wherein said phase port gain compensator means includes a plurality of circuit legs each having a circuit element and electronically controlled switch means.

Claim 10

The dual port phase-locked loop circuit of claim 7 wherein said phase port gain compensator further includes amplifier means having an input terminal and an output terminal, each of said circuit legs being connected between said input terminal of said phase port gain compensator means and said input terminal of said amplifier means, said output terminal of said amplifier means being coupled to the phase modulation summing circuit, said electronically controlled switch means being responsive to said second control signals from said compensator control means to selectively couple various ones of said circuit elements to said amplifier means to compensate for the otherwise undesirable effects caused by said changes in the divider ratio.

Claim 11

The dual port phase-locked loop circuit of claim 8 wherein said circuit elements include resistive means.

Claim 12

The dual port phase-locked loop circuit of claim 6 wherein said voltage controlled oscillator gain compensator means includes a plurality of circuit legs each including electronically controlled switch means and a circuit element.

Claim 13

The dual port phase-locked loop circuit of claim 10 wherein said voltage controlled oscillator gain compensator means further includes: input resistive means having an input terminal and an output terminal, said input terminal of said input resistive means being connected to said output terminal of the frequency modulation summing circuit; conductive means adapted to provide a reference potential; and each of said circuit legs being connected in parallel between said output terminal of said input resistive means and said conductive means.

Claim 14

The dual port phase-locked loop circuit of claim 10 wherein said circuit elements include resistive means.

Claim 15

The dual port phase-locked loop of claim 6 wherein said compensator control means further includes a programmable read only memory means.

Claim 16

The dual port phase-locked loop circuit of claim 7 wherein said compensator control means further includes programmable read only memory means having an input terminal connected to said conductive means, said programmable read only memory means responding to said first control signals to provide first digital signals at said first output terminal thereof for activating said electronically controlled switch means in said phase port gain compensator, said programmable read only memory means responding to said first control signals to provide second digital controls signal at said second output terminal thereof for activating said electronically controlled switch means in said voltage controlled oscillator gain compensator means.

Claim 17

The dual port phase-locked loop circuit of claim 10 wherein said compensator control means further includes programmable read only memory means having an input terminal connected to said conductive means, said programmable read only memory means responding to said first control signals to provide first digital signals at said first output terminal thereof for activating said electronically controlled switch means in said phase port gain compensator, said programmable read only memory means responding to said first control signals to provide second digital controls signal at said second output terminal thereof for activating said electronically controlled switch means in said voltage controlled oscillator gain compensator means.