System for measuring path coverage represented by the degree of passage of execution paths in a program

Claim 2

A path coverage measuring system, comprising: a main memory; a central processing unit connected to said main memory; means connected to said main memory and said central processing unit for generating a load module, which includes conditional branch instructions each having a flag field which is set to a first state when control has been branched and which is set to a second state when control has been passed without branching; means connected to said main memory for loading the load module in said main memory as an executable program; decoding/executing means provided in said central processing unit and connected to said main memory, for decoding an instruction from said main memory, and for changing, when the instruction is a conditional branch instruction, the state of the flag field in the conditional branch instruction, in accordance with a branch condition of the conditional branch instruction; and means connected to said main memory and said means for loading the load module, for rewriting part or all of the program into the load module, and obtaining a path coverage measurement from the load module after execution, when part or all of the program is unloaded from said main memory.

Claim 3

A system according to claim 1, wherein said flag field consists of a branch bit, representing that a branch is made when the conditional branch instruction is performed, and a through bit, representing that the control has passed through the conditional branch instruction without branching.

Claim 4

A system according to claim 1, wherein said load module generating means comprises a compiler for converting a source program including a conditional branch instruction not having a flag field into an object program including a conditional branch instruction having a flag field.

Claim 5

A system according to claim 2, wherein said decoding/executing means changes the branch bit to logic "1" when the conditional branch instruction is satisfied, and changes the through bit to logic "1" when the conditional branch instruction is not satisfied, and writes the instruction whose branch and/or through bits are changed in the same address of said main memory from which the conditional branch instruction is read out.

Claim 6

A path coverage measuring system, comprising: a main memory; a central processing unit connected to said main memory; means connected to said main memory and said central processing unit for generating a load module having a program in which second instructions instructing conversion of themselves into first instructions instructing no operation are inserted in all paths of the program due to branching; means connected to said main memory and said means for generating a load module, for loading the load module into said main memory as a program comprising a plurality of instructions executable by said central processing unit; decoding/executing means, provided in said central processing unit and connected to said main memory, for sequentially reading the plurality of instructions from said main memory, converting when detecting the second instruction, the second instruction into the first instruction, and performing, when detecting the first instruction, no operation and fetching the next instruction of the plurality of instructions; and means for rewriting part or all of the program in the load module; and means for obtaining a path coverage measurement from the load module after execution, when part or all of the program is unloaded from said main memory.

Claim 7

A path coverage measuring system, comprising: a main memory; a central processing unit connected to said main memory; means connected to said main memory and said central processing unit for generating a load module having a program in which second instructions instructing conversion of themselves into first instructions instructing no operation are inserted in all paths of the program due to branching; means connected to said main memory and said means for generating a load module, for loading the load module into said main memory as a program comprising a plurality of instructions executable by said central processing unit; decoding/executing means, provided in said central processing unit and connected to said main memory, for sequentially reading the plurality of instructions from said main memory, converting when detecting the second instruction, the second instruction into the first instruction, and performing, when detecting the first instruction, no operation and fetching the next instruction of the plurality of instructions; and means for rewriting part or all of the program in the load module; and means for obtaining a path coverage measurement from the load module after execution, when part or all of the program is unloaded from said main memory.

Claim 8

A system according to claim 5, wherein said means for obtaining a path coverage measurement from the load module counts a number T of the first instructions and a number C of the second instructions and calculates path coverage, given by T/(C+T).