US4739472A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Information processing device capable of rapidly processing instructions of different groups
Assignee: NEC Corp
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Filing: 1985-12-06
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Granted: 1988-04-19
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Expires: 2005-12-06
Abstract
Abstract In an information processing device comprising an instruction decoder, an instruction processing unit, and a memory unit, the instruction decoder classifies a sequence of instructions into a first group for the instruction processing unit and a second group for making the memory unit cooperate with the instruction processing unit. The instructions of the first group are temporarily retained in an instruction stack register before delivery to the instruction processing unit while the instructions of the second group is directly delivered to the memory unit. A state indication unit produces a plurality of flags representative of internal states of the instruction processing unit. A monitoring unit monitors the instructions, the retained first-group instruction, and the flags to enable the instruction processing unit, the memory unit, and the instruction stack register and to change the flags. The memory unit can consecutively be accessed for loading the instruction processing unit with data signals or for storage of data signals into the instruction processing unit so as to make the same continuously run without superfluous interruption because the instructions of the second group are executed prior to execution of the first group.
Inventors
- 👤 Hideo Hayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:16
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3885; G06F9/3889; G06F9/3836; G06F9/3838
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
278 words
In an information processing device operable in response to a sequence of instructions and comprising: an instruction interpreting unit for interpreting said instructions to produce a first and a second indication signal when said instructions being to a first and a second groups, respectively an instruction processing unit coupled to said instruction interpreting unit for processing the instructions of said first group in response to said first indication signal to produce a result of processing; utilizing means coupled to said instruction interpreting unit and said instruction processing unit for utilizing the results of said instruction processing unit in compliance with the instructions of said second group in response to said second indication signal; and wherein said instruction interpreting unit includes: state indicating means for producing a plurality of state indicating signals, said state indicating signals being indicative of internal states of said instruction process unit; stack register means responsive to an enable signal for temporarily storing the instructions of said first group to produce retained, first-group instructions which are delayed in time relative to aid second group of instructions; and local processing means responsive to the instructions of said first and said second groups and coupled to said stack register means, said state indicating means, said instruction processing unit, and said utilizing means, said local processing means processing the instructions of said first and said second groups with reference to said state indicating signals and said retained, first-group instructions to deliver said first and second indication signals to said instruction processing unit and said utilizing means, respectively, and to deliver said enable signal to said stack register means when the instruction being processed belongs to said first group.
Claim 2
Dependent Claim
278 words
In an information processing device operable in response to a sequence of instructions and comprising: an instruction interpreting unit for interpreting said instructions to produce a first and a second indication signal when said instructions being to a first and a second groups, respectively an instruction processing unit coupled to said instruction interpreting unit for processing the instructions of said first group in response to said first indication signal to produce a result of processing; utilizing means coupled to said instruction interpreting unit and said instruction processing unit for utilizing the results of said instruction processing unit in compliance with the instructions of said second group in response to said second indication signal; and wherein said instruction interpreting unit includes: state indicating means for producing a plurality of state indicating signals, said state indicating signals being indicative of internal states of said instruction process unit; stack register means responsive to an enable signal for temporarily storing the instructions of said first group to produce retained, first-group instructions which are delayed in time relative to aid second group of instructions; and local processing means responsive to the instructions of said first and said second groups and coupled to said stack register means, said state indicating means, said instruction processing unit, and said utilizing means, said local processing means processing the instructions of said first and said second groups with reference to said state indicating signals and said retained, first-group instructions to deliver said first and second indication signals to said instruction processing unit and said utilizing means, respectively, and to deliver said enable signal to said stack register means when the instruction being processed belongs to said first group.
Claim 3
Dependent Claim
209 words
An information processing device as claimed in claim 1, wherein said local processing means comprises: first decoder means for decoding the instructions of said first and said second groups to selectively produce a first and a second decoded signal indicative of reception of said first and second groups, respectively; first delivery means operatively coupled to said first decoder means and said stack register means for delivering said enable signal to said stack register means to make said stack register means store the instructions of said first group with reference to said state indicating signals in response to said first decode signal; second delivery means operatively coupled to said stack register means, said state indicating means, and said first decoder means, for delivering said first indication signal to said instruction processing unit with reference to said retained first-group instructions and said state indicating signals when said first decoded signal is produced from said first decoder means; and third delivery means operatively coupled to said first decoder means, said state indicating means, and said stack register means for delivering said second indication signal to said utilizing means with reference to said retained first-group instructions and said state indicating signals when said second decoded signal is produced from said first decoder means.
Claim 4
Dependent Claim
59 words
An information processing device as claimed in claim 2, wherein said local processing means further comprises: fourth delivery means coupled to said first decoder means, said stack register means, said state indicating means, and said first through third delivery means for delivering flag signals to said state indicating means to modify said state indicating signals by said flag signals.
References Cited (Backward Citations)
US4128880A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-04-19 | 1991-10-19 | 1992-04-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-04-19 | 1995-10-19 | 1996-04-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-04-19 | 1999-10-19 | 2000-04-19 | $7700.00 | Window Closed / Lapsed |