Electronic control of imaging system

Claim 2

In a matrix imaging device, a method of electronically establishing the sequence of control of an array of imaging elements wherein the sequencing of individual imaging elements is dependent on the relative displacement of imaging elements in the direction of scan or on direction of scan, the method comprising: supplying image element control data in a sequence independent of the relative displacement of imaging elements in the direction of scan and independent of direction of scan; sequentially addressing a random access memory and writing the element control data into the random access memory at the addressed memory locations in a first order; sequentially reading the element control data from the random access memory in an order other than said first order to delay certain of the element control data in the random access memory; and applying the element control data read from the random access memory to means for driving the array of imaging elements.

Claim 3

A method as claimed in claim 1 wherein the random access memory is sequentially addressed at addresses read from a read only memory.

Claim 4

A method as claimed in claim 1 wherein the random access memory sequential addressing is obtained from a first address sequence stored in memory for forward scan and from a second address sequence stored in memory for reverse scan.

Claim 5

A method as claimed in claim 1 wherein data is read from the memory and new data is immediately written into the memory at each address during the sequential addressing of the random access memory.

Claim 6

A method as claimed in claim 4 wherein, during reverse scan, the sequential order of addressing within groups of memory locations is alternated such that data written into the random access memory in one order within the group is subsequently read from the memory in reverse order during a subsequent address sequence.

Claim 7

A method as claimed in claim 5 wherein the data associated with display imaging elements is delayed by addressing groups of memory locations which groups are greater in number for the data to be delayed than for the data which is not to be delayed.

Claim 8

A method as claimed in claim 4 wherein the data associated with display imaging elements is delayed by addressing groups of memory locations which groups are greater in number for the data to be delayed than for data which is not to be delayed.

Claim 11

A method as claimed in claim 8 wherein the slice times and odd/even times are about equal to a tilt time corresponding to the time during which an entire array of imaging elements is energized.

Claim 12

A method as claimed in claim 8 wherein the bytes are stored in a random access memory.

Claim 13

A method as claimed in claim 10 wherein the bytes are read from and written into the random access memory according to an address sequence determined by a read only memory.

Claim 14

A method as claimed in claim 8 wherein, in reverse scan, the leading row bytes are stored in a random access memory at a number of byte addresses which correspond to the number of bytes of leading pels within a slice and the bytes are read from and written into each address sequentially, with a reversal of order of read-out/write-in after each slice, and the lagging bytes are stored in a random access memory at a number of addresses which corresponds to twice the number of bytes of lagging pels within a slice and the bytes are read from and written into the addresses sequentially through the first and second halves of the addresses and then read from and written into the first half of the addresses in reverse order and then read from and written into the second half of the addresses in reverse order.

Claim 17

A method as claimed in claim 13 wherein the bytes are stored in a random access memory.

Claim 18

A method as claimed in claim 14 wherein the bytes are read from and written into the random access memory according to an address sequence determined by a read only memory.

Claim 19

A method as claimed in claim 13 wherein, in reverse scan, the leading row bytes are stored in a random access memory at a number of byte addresses which correspond to the number of bytes of leading pels within a slice and the bytes are read from and written into each address sequentially, with a reversal of order of read-out/write-in after each slice, and the lagging bytes are stored in a random access memory at a number of addresses which corresponds to twice the number of bytes of lagging pels within a slice and the bytes are read from and written into the addresses sequentially through the first and second halves of the addresses and then read from and written into the first half of the addresses in reverse order and then read from and written into the second half of the addresses in reverse order.

Claim 20

A control circuit for controlling a bidirectional scanning array of imaging elements in a matrix imaging device where the scanning array corresponds, at any instant of scan, to staggered odd and even rows of pels at adjacent character slices generally perpendicular to the direction of scan, the scanning array being slanted from the perpendicular, the circuit comprising: means for receiving data bits for a group of pels from both odd and even rows; means for dividing the data bits into even and odd bytes corresponding to leading and lagging pels; a random access memory for receiving the even and odd bytes and temporarily storing the bytes; drive means for receiving the even and odd bytes from the random access memory and driving the array of imaging elements in response thereto; and addressing control means for controlling the addresses at which the even and odd bytes are written into memory and the timing with which the bytes are read from memory and applied to the drive means, the addressing and reading of bytes being such that a. with forward scan, at least the bytes corresponding to the lagging row of pels are written sequentially into storage and those bytes are sequentially read out of storage in the same sequential order such that the difference in storage times for the leading and lagging bytes is an odd/even time which corresponds to the difference in times at which the staggered rows each slice; and b. in reverse scan, all bytes are sequentially written into and out of storage in reverse order such that i. for the lagging rows, each byte is held in storage prior to readout for a slice time which corresponds to the difference in times at which each row passes adjacent slices plus an odd/even time which corresponds to the difference in times at which the staggered leading and lagging rows pass each slice, and ii. for the leading rows, each byte is stored for a slice time corresponding to the difference in times at which each row passes adjacent slices.

Claim 21

A control circuit for controlling a bidirectional scanning array of imaging elements in a matrix imaging device where the scanning array corresponds, at any instant of scan, to staggered odd and even rows of pels at adjacent character slices generally perpendicular to the direction of scan, the scanning array being slanted from the perpendicular, the circuit comprising: means for receiving data bits for a group of pels from both odd and even rows; means for dividing the data bits into even and odd bytes corresponding to leading and lagging pels; a random access memory for receiving the even and odd bytes and temporarily storing the bytes; drive means for receiving the even and odd bytes from the random access memory and driving the array of imaging elements in response thereto; and addressing control means for controlling the addresses at which the even and odd bytes are written into memory and the timing with which the bytes are read from memory and applied to the drive means, the addressing and reading of bytes being such that a. with forward scan, at least the bytes corresponding to the lagging row of pels are written sequentially into storage and those bytes are sequentially read out of storage in the same sequential order such that the difference in storage times for the leading and lagging bytes is an odd/even time which corresponds to the difference in times at which the staggered rows each slice; and b. in reverse scan, all bytes are sequentially written into and out of storage in reverse order such that i. for the lagging rows, each byte is held in storage prior to readout for a slice time which corresponds to the difference in times at which each row passes adjacent slices plus an odd/even time which corresponds to the difference in times at which the staggered leading and lagging rows pass each slice, and ii. for the leading rows, each byte is stored for a slice time corresponding to the difference in times at which each row passes adjacent slices.

Claim 22

A control circuit as claimed in claim 17 wherein the addressing control means comprises a read only memory.

Claim 23

A control circuit as claimed in claim 17 wherein, in reverse scan, the leading row bytes are stored in a random access memory at a number of byte addresses which correspond to the number of bytes of leading pels within a slice and the bytes are read from and written into each address sequentially, with a reversal of order of read-out/write-in after each slice, and the lagging bytes are stored in a random access memory at a number of addresses which corresponds to twice the number of bytes of lagging pels within a slice and the bytes are read from and written into the addresses sequentially through the first and second halves of the addresses and then read from and written into the first half of the addresses in reverse order and then read from and written into the second half of the addresses in reverse order.

Claim 26

A method as claimed in claim 20 wherein the data memory control bits include a row address strobe and column address strobe to the data memory.

Claim 27

A method as claimed in claim 20 wherein the data memory is a dynamic RAM.

Claim 30

sequentially reading data from the electronic memory corresponding to a slice of pels in the character image, providing color data for each pel in said slice of pels by changing the pel color as a character contour is intersected, and applying the color data to means for controlling the array of imaging elements.

Claim 31

sequentially reading data from the electronic memory corresponding to a slice of pels in the character image, providing color data for each pel in said slice of pels by changing the pel color as a character contour is intersected, and applying the color data to means for controlling the array of imaging elements.

Claim 32

A method as claimed in claim 1 wherein character contours of successive image characters are written into alternate memory segments and wherein color data from the separate memory segments is combined in logic circuitry.

Claim 33

An electronic control for a scanning array of imaging elements in a matrix imaging device comprising: a random access memory; means for writing a character contour into the random access memory, memory addresses corresponding to specific pel locations in a character image; means for sequentially reading from the electronic memory data corresponding to a slice of pels in the character image; and means for providing color data for each pel in the character image by changing the pel color as a character contour is intersected in reading data from the electronic memory.

Claim 34

An electronic control for a scanning array of imaging elements in a matrix imaging device comprising: a random access memory; means for writing a character contour into the random access memory, memory addresses corresponding to specific pel locations in a character image; means for sequentially reading from the electronic memory data corresponding to a slice of pels in the character image; and means for providing color data for each pel in the character image by changing the pel color as a character contour is intersected in reading data from the electronic memory.

Claim 35

An electronic control as claimed in claim 3 further comprising means for writing character contours of successive image characters into alternate memory segments and means for combining the color data provided from the respective memory segments to provide color data for the successive image characters.