US4739280A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Amplifier circuit having reduced crossover distortion
Assignee: Nippon Gakki Co Ltd
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Filing: 1987-05-11
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Granted: 1988-04-19
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Expires: 2007-05-11
Abstract
Abstract An amplifier circuit including two general purpose operational amplifiers is disclosed. The output terminals of first and second operational amplifiers are connected via first and second resistors in series. A connection point between the first and second resistors is connected to an output terminal and is also connected to an inverting input terminal of the first operational amplifier via a feedback loop. Thus, the first and second operational amplifiers work as class-A amplifier, so that the crossover distortion is prevented from being generated. An input signal is inputted to a non-inverting input terminal of the first operational amplifier wherein the input signal is amplified. The amplified input signal is added with a dc bias voltage and is supplied to a non-inverting input terminal of the second operational amplifier. The output voltage of the first operational amplifier varies in a positive voltage area, and the output voltage of the second operational amplifier varies in a negative voltage area. Thus, an output signal of which distortion factor is relatively small is produced at the output terminal.
Inventors
- 👤 Masao Noro
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 05:52
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/32; H03F1/3217
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
200 words
An amplifier circuit comprising: (a) a first operational amplifier for amplifying an input signal, said input signal being inputted into a non-inverting input terminal of said first operational amplifier wherein said input signal is amplified and the amplified input signal is outputted as a first output signal; (b) dc bias means for adding a dc bias voltage to said first output signal so as to produce a dc biased signal; (c) a second operational amplifier for amplifying said dc biased signal, said dc biased signal being inputted into a non-inverting input terminal of said second operational amplifier wherein said dc biased signal is amplified and the amplified dc biased signal is outputted as a second output signal; (d) output means for outputting a third output signal, said output means comprising of first and second resistors which are connected in series, said output means being connected between output terminals of said first and second operational amplifiers, said third output signal being obtained at a connection point of said first and second resistors and being outputted to an output terminal; and (e) a feedback loop for feeding back said third output signal to an inverting input terminal of said first operational amplifier.
Claim 2
Dependent Claim
200 words
An amplifier circuit comprising: (a) a first operational amplifier for amplifying an input signal, said input signal being inputted into a non-inverting input terminal of said first operational amplifier wherein said input signal is amplified and the amplified input signal is outputted as a first output signal; (b) dc bias means for adding a dc bias voltage to said first output signal so as to produce a dc biased signal; (c) a second operational amplifier for amplifying said dc biased signal, said dc biased signal being inputted into a non-inverting input terminal of said second operational amplifier wherein said dc biased signal is amplified and the amplified dc biased signal is outputted as a second output signal; (d) output means for outputting a third output signal, said output means comprising of first and second resistors which are connected in series, said output means being connected between output terminals of said first and second operational amplifiers, said third output signal being obtained at a connection point of said first and second resistors and being outputted to an output terminal; and (e) a feedback loop for feeding back said third output signal to an inverting input terminal of said first operational amplifier.
Claim 3
Dependent Claim
28 words
An amplifier circuit according to claim 1, wherein a gain of said second operational amplifier equals to "1" and said second operational amplifier works as a voltage follower.
Claim 4
Dependent Claim
77 words
An amplifier circuit according to claim 1, wherein said dc bias means comprises of third and forth resistors which are connected in series, a source power being supplied to one terminal of said dc bias means while another terminal of said dc bias means is connected to the output terminal of said first operational amplifier, and a connection point between said third and forth resistors being connected to the noninverting input terminal of said second operational amplifier.
Claim 5
Dependent Claim
40 words
An amplifier circuit according to claim 3, wherein said dc bias means further comprises of a capacitor, said capacitor being connected between the output terminal of said first operational amplifier and the connection point between said third and forth resistors.
Claim 6
Dependent Claim
80 words
An amplifier circuit according to claim 3 further includes fifth and sixth resistors, one terminal of said fifth resistor being connected to the output terminal of said second operational amplifier while another terminal of said fifth resistor is connected to one terminal of said sixth resistor and an inverting input terminal of said second operational amplifier, and a source power being supplied to another terminal of said sixth resistor so that said second operational amplifier works as a non-inverting amplifier.
References Cited (Backward Citations)
JPS5566110A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-04-19 | 1991-10-19 | 1992-04-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-04-19 | 1995-10-19 | 1996-04-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-04-19 | 1999-10-19 | 2000-04-19 | $7700.00 | Window Closed / Lapsed |