US4737902A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Inner potential generating circuit
Assignee: Mitsubishi Electric Corp
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Filing: 1987-02-17
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Granted: 1988-04-12
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Expires: 2007-02-17
Abstract
Abstract When a prescribed value of inner potential is provided from AC voltage received by an input terminal (1), first input means (30) and second input means (20) control gate voltages of first and second transistors (8) and (7), respectively, so that the inner potential may not be influenced by threshold voltage of these transistors.
Inventors
- 👤 Yoshiharu Nakao
- 👤 Youichi Tobita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 23:07
CPC Classifications
H; H10; H10D; H10D84/00; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/205
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
282 words
An inner potential generating circuit for generating a predetermined constant value of DC voltage based on an AC voltage of rectangular waveform, comprising: an input terminal to which said AC voltage of a rectangular waveform is applied, an output terminal for providing said constant DC voltage; a capacitor and first transistor connected in series between said input terminal and said output terminal; a node interconnecting said capacitor and said first transistor, a potential on the node rising or falling according to a change in said AC voltage; a constant reference potential source; a second transistor connected between said node and said reference potential source; first input means for (a) turning said first transistor on in response to a first transition of said rectangular waveform to a first magnitude and off when a potential on said node reaches a potential of said output terminal, (b) maintaining said first transistor on until a potential of said node is substantially the same as a potential of said output terminal, and (c) maintaining said first transistor off during an interval from a second transition of said rectangular waveform to a second magnitude until the next transition of said rectangular waveform to the first magnitude; and second input means for (a) turning said second transistor on when said second transition of said rectangular waveform to said second magnitude occurs, (b) maintaining said second transistor on until the potential of said node is substantially the same as the potential of said reference potential source, and (c) maintaining said second transistor off during an interval from said first transition of said rectangular waveform to said second magnitude until said second transition of said rectangular waveform to said second magnitude.
Claim 2
Dependent Claim
282 words
An inner potential generating circuit for generating a predetermined constant value of DC voltage based on an AC voltage of rectangular waveform, comprising: an input terminal to which said AC voltage of a rectangular waveform is applied, an output terminal for providing said constant DC voltage; a capacitor and first transistor connected in series between said input terminal and said output terminal; a node interconnecting said capacitor and said first transistor, a potential on the node rising or falling according to a change in said AC voltage; a constant reference potential source; a second transistor connected between said node and said reference potential source; first input means for (a) turning said first transistor on in response to a first transition of said rectangular waveform to a first magnitude and off when a potential on said node reaches a potential of said output terminal, (b) maintaining said first transistor on until a potential of said node is substantially the same as a potential of said output terminal, and (c) maintaining said first transistor off during an interval from a second transition of said rectangular waveform to a second magnitude until the next transition of said rectangular waveform to the first magnitude; and second input means for (a) turning said second transistor on when said second transition of said rectangular waveform to said second magnitude occurs, (b) maintaining said second transistor on until the potential of said node is substantially the same as the potential of said reference potential source, and (c) maintaining said second transistor off during an interval from said first transition of said rectangular waveform to said second magnitude until said second transition of said rectangular waveform to said second magnitude.
Claim 3
Dependent Claim
50 words
An inner potential generating circuit in accordance with claim 1, wherein said first input means comprises a first time constant circuit for controlling a base voltage of said first transistor, and said second input means comprises a second time constant circuit for controlling a base voltage of said second transistor.
Claim 4
Dependent Claim
118 words
An inner potential generating circuit in accordance with claim 2, wherein said first time constant circuit comprises: a capacitor having one end connected to said input terminal through an invertor circuit and another end connected to the gate of said first transistor, and a resistor having one end connected to the gate of said first transistor and another end connected to said output terminal, said second time constant circuit comprises: a capacitor having one end connected to said input terminal through said invertor circuit and another end connected to the gate of said second transistor, and a resistor having one end connected to the gate of said second transistor and another end connected to said reference potential source.
Claim 5
Dependent Claim
20 words
An inner potential generating circuit in accordance with claim 3, wherein said reference potential source is at a ground potential.
Claim 6
Dependent Claim
21 words
An inner potential generating circuit in accordance with claim 3, wherein said reference potential source is at a power supply potential.
Claim 7
Dependent Claim
34 words
An inner potential generating circuit in accordance with claim 1, wherein said AC voltage of rectangular waveform applied to said input terminal does not involve voltage drop due to threshold voltage of any transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-04-12 | 1991-10-12 | 1992-04-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-04-12 | 1995-10-12 | 1996-04-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-04-12 | 1999-10-12 | 2000-04-12 | $7700.00 | Window Closed / Lapsed |