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US4737730A Expired / Lapsed US ⏱️ 0.0 years remaining

Peak detector circuit for FM measuring apparatus

Assignee: Ando Electric Co Ltd
•
Filing: 1986-07-21
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Granted: 1988-04-12
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Expires: 2006-07-21
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Abstract

Abstract A peak detector circuit comprises a peak detecting diode circuitry for detecting peaks in an input FM demodulated signal, a capacitor connected to the output of the diode circuitry, a first resistor connected in parallel with the capacitor, and an amplifier connected to the output of the diode circuitry and having a high input impedance. A second resistor is connected to the first resistor in parallel therewith through a turn-on/off switch for discharging and subsequently charging the capacitor within a short time in response to detection of decreasing in the level of the input FM demodulated signal.

Inventors

  • 👤 Makoto Ishiwata
  • 👤 Masayoshi Asai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 14:20
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/04; H; H03; H03D; H03D1/00; H03D1/08; H03D1/10

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 88 words
A peak detector circuit, comprising peak detecting diode circuitry for detecting peaks in an FM demodulated signal to said peak detector circuit, a capacitor connected to the output of said diode circuitry, and an amplifier connected to the output of said diode circuitry and having a high input impedance, discharging means connected in parallel with said capacitor for effecting rapid discharging of said capacitor within a shortened time and means for actuating said discharging means in response to a decrease in the level of said FM demodulated signal.
Claim 2
Dependent Claim 88 words
A peak detector circuit, comprising peak detecting diode circuitry for detecting peaks in an FM demodulated signal to said peak detector circuit, a capacitor connected to the output of said diode circuitry, and an amplifier connected to the output of said diode circuitry and having a high input impedance, discharging means connected in parallel with said capacitor for effecting rapid discharging of said capacitor within a shortened time and means for actuating said discharging means in response to a decrease in the level of said FM demodulated signal.
Claim 3
Dependent Claim 20 words
A peak detector circuit according to claim 1, wherein said capacitor is again charged rapidly immediately after said rapid discharging.
Claim 4
Dependent Claim 46 words
A peak detector circuit according to claim 1, wherein said discharging means includes a resistor and a switch in series, said switch being first turned on and then immediately thereafter turned off in response to a decrease in the peak level of said FM demodulated signal.
Claim 5
Dependent Claim 79 words
A peak detector circuit according to claim 3, wherein a pair of channels each including said diode circuitry, said capacitor, said resistor, said switch and said amplifier are provided in parallel with each other, the outputs of said channels being combined through an adder, the diodes of one channel being connected with a polarity opposite to that of the diodes belonging to the other channel so that the peak level of either positive or negative polarities can be detected.

References Cited (Backward Citations)

US3508158A Cited
US4432235A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-04-12 1991-10-12 1992-04-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-04-12 1995-10-12 1996-04-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-04-12 1999-10-12 2000-04-12 $7700.00 Window Closed / Lapsed

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