Monolithic integrated circuit having common external terminal for analog and digital signals and digital system using the same

Claim 2

A microprocessor having a register, an internal bus, an arithmetic and logic unit, a plurality of external terminals and a control circuit, said microprocessor comprising: a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node and at least one output node coupled to said internal bus; first switching means for transmitting to said analog signal input node an analog signal from at least one of said external terminals coupled to said digital signal input circuit; and second switching means for selectively coupling said output node of said digital signal input circuit to said internal bus.

Claim 3

A microprocessor according to claim 1 wherein said analog signal input circuit comprises a converter for converting an analog signal on said analog signal input node to a digital signal.

Claim 4

A microprocessor according to claim 2 wherein said analog signal input circuit further comprises a register to be coupled to an output node of said converter.

Claim 5

A microprocessor according to claims 2 or 3 wherein said digital signal input circuit includes a register coupled to said second switching means.

Claim 6

In a digital control system having a controllable device having its operation controlled by digital control signals and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising: a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals; a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input node of said digital signal input circuit; first switching means for coupling the output node of said digital signal input circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital and said analog signal input circuits to said internal bus at the same time.

Claim 7

In a digital control system having a controllable device having its operation controlled by digital control signals and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising: a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals; a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input node of said digital signal input circuit; first switching means for coupling the output node of said digital signal input circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital and said analog signal input circuits to said internal bus at the same time.

Claim 8

A digital control system according to claim 5 wherein said analog signal input circuit comprises a converter for converting an analog signal over said analog signal input node to digital signal.

Claim 9

In a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals, said microprocessor comprising: a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input node of said digital signal input circuit; first switching means for coupling the output node of said digital signal input circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital and said analog signal input circuits to said internal bus at the same time.

Claim 10

In a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals, said microprocessor comprising: a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input node of said digital signal input circuit; first switching means for coupling the output node of said digital signal input circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital and said analog signal input circuits to said internal bus at the same time.

Claim 11

A microprocessor according to claim 7 wherein said analog signal input circuit comprises a converter for converting an analog signal over said analog signal input node to a digital signal.

Claim 12

A microprocessor according to claim 8 wherein said analog signal input circuit has a plurality of analog signal input nodes, and an analog multiplexer for transmitting one of analog input signals to be fed to said at least one analog signal input node to said converter.

Claim 13

A microprocessor acocrding to claim 9 wherein said analog input circuit comprises a register to be coupled to an output node of said converter.

Claim 14

A microprocessor according to claims 8, 9 or 10 wherein said digital input circuit includes a register coupled to said first switching means.

Claim 15

In a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control unit and a plurality of external terminals, said microprocessor comprising: a digital signal input output circuit having at least one digital signal input output node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input output node of said digital signal input output circuit; first switching means for coupling the output node of said digital signal input output circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital signal input output circuit and said analog signal input circuits to said internal bus at the same time.

Claim 16

In a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control unit and a plurality of external terminals, said microprocessor comprising: a digital signal input output circuit having at least one digital signal input output node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input output node of said digital signal input output circuit; first switching means for coupling the output node of said digital signal input output circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital signal input output circuit and said analog signal input circuits to said internal bus at the same time.

Claim 17

A microprocessor according to claim 12 wherein said analog signal input circuit comprises a converter for converting an analog signal over said analog signal input node to a digital signal.

Claim 18

A microprocessor according to claim 13 wherein said analog signal input circuit has a plurality of analog signal input nodes, and an analog multiplexer for transmitting one of analog input signals to be fed to said analog signal input nodes of said converter.

Claim 19

A microprocessor according to claim 14 wherein said analog input circuit comprises a register to be coupled to an output node of said converter.

Claim 20

A microprocessor according to claims 13, 14 or 15 wherein said digital input output circuit includes a register coupled to said first switching means.

Claim 21

In a digital control system having a controllable device having its operation controlled by digital control signals; and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising: a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals; a digital signal input output circuit having at least one digital signal input output node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input output node of said digital signal input output circuit; first switching means for coupling the output node of said digital signal input output circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital signal input output circuit and said analog signal input circuits to said internal bus at the same time.

Claim 22

In a digital control system having a controllable device having its operation controlled by digital control signals; and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising: a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals; a digital signal input output circuit having at least one digital signal input output node coupled to one or more of said plurality of external terminals and at least one output node; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node; at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input output node of said digital signal input output circuit; first switching means for coupling the output node of said digital signal input output circuit to said internal bus; second switching means for coupling the output node of said analog signal input circuit to said internal bus; and wherein each of said first and second switching means does not couple output nodes of said digital signal input output circuit and said analog signal input circuits to said internal bus at the same time.

Claim 23

A digital control system according to claim 17 wherein said analog signal input circuit comprises a converter for converting an analog signal over said analog signal input node to digital signal.

Claim 24

A microprocessor having a register, an internal bus, an arithmetic and logic unit, a plurality of external terminals and control means, said microprocessor comprising: a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals; at least one of said external terminals being coupled in common to said analog and said digital signal input circuits; said digital signal input circuit having first switching means for selectively coupling said digital signal input node to said internal bus; said analog signal input circuit having second switching means for selectively coupling said analog signal input node to said internal bus; and the switching states of said first and second switching means being controlled by said control means.

Claim 25

A microprocessor having a register, an internal bus, an arithmetic and logic unit, a plurality of external terminals and control means, said microprocessor comprising: a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals; at least one of said external terminals being coupled in common to said analog and said digital signal input circuits; said digital signal input circuit having first switching means for selectively coupling said digital signal input node to said internal bus; said analog signal input circuit having second switching means for selectively coupling said analog signal input node to said internal bus; and the switching states of said first and second switching means being controlled by said control means.

Claim 26

A microprocessor according to claim 19 wherein said analog signal input circuit comprises a converter for converting an analog signal over said analog signal input node to a digital signal.

Claim 27

A microprocessor according to claim 20 wherein said analog signal input circuit has a plurality of analog signal input nodes, and an analog multiplexer for transmitting one of analog input signals to be fed to said analog signal input nodes to said converter.

Claim 28

A microprocessor according to claim 21 wherein said analog signal input circuit comprises a register to be coupled to an output node of said converter.

Claim 29

In a digital control system having a controllable device having its operation controlled by digital control signals and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising: a microprocessor having a register, an internal bus, an arithmetic and logic unit, control means and a plurality of external terminals; a digital signal input circuit having at least one digital signal node coupled to one or more of said plurality of external terminals; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals; at least one of said external terminals being coupled in common to said analog and said digital signal input circuits; said digital signal input circuit has first switching means for selectively coupling said digital signal input node to said internal bus; said analog signal input circuit has second switching means for selectively coupling said analog signal input node to said internal bus; and the switching states of said first and second switching means being controlled by said control means.

Claim 30

In a digital control system having a controllable device having its operation controlled by digital control signals and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising: a microprocessor having a register, an internal bus, an arithmetic and logic unit, control means and a plurality of external terminals; a digital signal input circuit having at least one digital signal node coupled to one or more of said plurality of external terminals; an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals; at least one of said external terminals being coupled in common to said analog and said digital signal input circuits; said digital signal input circuit has first switching means for selectively coupling said digital signal input node to said internal bus; said analog signal input circuit has second switching means for selectively coupling said analog signal input node to said internal bus; and the switching states of said first and second switching means being controlled by said control means.

Claim 31

A digital control system according to claim 23 wherein said analog signal input circuits comprises a converter for converting an analog signal over said analog signal input node to digital signal.

Claim 32

A microprocessor according to claim 24 wherein said analog signal input circuit has a plurality of analog signal input nodes, and an analog multiplexer for transmitting one of analog input signals to be fed to said analog signal input nodes to said converter.

Claim 33

A microprocessor according to claim 25 wherein said analog input circuit comprises a register to be coupled to an output node of said converter.