Travelling-wave microwave device

Claim 2

A travelling-wave device, comprising: (a) an input transmission line; (b) an output transmission line; (c) at least one active device distributed between said two transmission lines; (d) a first termination for said input transmission line, said first termination providing substantial reflection and phase shift at a first frequency, wherein said first frequency is about the upper end of the frequency band of said travelling-wave device; and (e) a second termination for said output transmission line, said second termination providing substantial reflection and phase shift as said first frequency, wherein the sum of the phase shifts of said first and second terminations approximates the sum of the phase shifts along the lengths of said input and output transmission lines.

Claim 3

The device of claim 1, wherein: (a) said at least one active device is a single FET with a plurality of gate feeding fingers connecting the gate of said FET to said input transmission line; (b) the drain contact of said FET is connected to said output transmission line; and (c) the source contact of said FET is connected to a reference terminal.

Claim 4

The device of claim 2, further comprising: (a) a plurality of source contacts for said FET with each of said source contacts located between a pair of said gate feeding fingers; (b) said input transmission line is parallel to said gate; and (c) said output transmission line is integral with the drain contact of said FET.

Claim 5

The device of claim 3, wherein: (a) said FET is formed at a first surface of a semiconductor substrate; (b) said transmission lines are microstrip lines on said first surface with a ground plane on a second surface of said substrate; (c) each of said plurality of source contacts is connected through a via to said ground plane; and (d) said gate feeding fingers are formed on said first surface.

Claim 6

The device of claim 3, wherein: (a) said FET is formed at a first surface of a semiconductor substrate; (b) said transmission lines are microstrip lines on said first surface with a ground plane on a second surface of said substrate; (c) each of said plurality of source contacts is connected by an air bridge over said input transmission line to a reference line on said first surface; and (d) said gate feeding fingers are formed on said first surface.

Claim 7

The device of claim 1, wherein: (a) said at least one active device is a single FET with a plurality of gate feeding fingers connecting the gate of said FET to a reference terminal; (b) the drain contact of said FET is connected to said output transmission line; and (c) the source of said FET is connected to said input transmission line.

Claim 8

The device of claim 1, wherein: (a) said at least one active device is a single dual-gate FET with a plurality of gate feeding fingers connecting the first gate of said FET to said input transmission line; (b) the second gate is connected to a reference potential; (c) the drain contact of said FET is connected to said output transmission line; and (d) the source contact of said FET is connected to a reference terminal.

Claim 9

A monolithic semiconductor travelling-wave device, comprising: (a) a semiconductor substrate with substantially planar upper and lower surfaces, said lower surface containing a conductive region; (b) an input conductive line on said upper surface, said input conductive line over said conductive region and forming an input transmission line therewith; (c) an output conductive line on said upper surface, said output conductive line over said conductive region and forming an output transmission line therewith; (d) an active area in said substrate at said upper surface; (e) a gate on said upper surface and over said active area; (f) a source contact on said upper surface and over said active area; (g) a drain contact on said upper surface and over said active area, said active area, sourcce contact, gate, and drain contact forming a field effect transistor; (h) a plurality of gate feeding fingers connecting said gate to said input conductive line; (i) a connection between said drain contact and said output conductive line; (j) a reference terminal connected to said source contact; (k) a first termination for said input transmission line; and (l) a second termination for said output transmission line, said first and second terminations providing substantial reflection and phase shift about the upper end of the frequency band of said travelling-wave device.

Claim 10

A monolithic semiconductor travelling-wave device, comprising: (a) a semiconductor substrate with substantially planar upper and lower surfaces, said lower surface containing a conductive region; (b) an input conductive line on said upper surface, said input conductive line over said conductive region and forming an input transmission line therewith; (c) an output conductive line on said upper surface, said output conductive line over said conductive region and forming an output transmission line therewith; (d) an active area in said substrate at said upper surface; (e) a gate on said upper surface and over said active area; (f) a source contact on said upper surface and over said active area; (g) a drain contact on said upper surface and over said active area, said active area, sourcce contact, gate, and drain contact forming a field effect transistor; (h) a plurality of gate feeding fingers connecting said gate to said input conductive line; (i) a connection between said drain contact and said output conductive line; (j) a reference terminal connected to said source contact; (k) a first termination for said input transmission line; and (l) a second termination for said output transmission line, said first and second terminations providing substantial reflection and phase shift about the upper end of the frequency band of said travelling-wave device.

Claim 11

The device of claim 8, wherein: (a) said substrate is semi-insulating gallium arsenide; (b) said active area is a doped region in said substrate; (c) said gate forms a Schottky barrier with said active area; (d) said drain contact forms an ohmic contact with said active area; (e) said source contact is a plurality of ohmic contacts with said active area, each of said plurality located between two of said gate feeding fingers; (f) said input and output conductive lines are made of metal on said upper surface; and (g) said conductive region is made of metal on said substrate lower surface.

Claim 12

The device of claim 9, wherein: (a) said drain contact is integral with said output conductive line; and (b) said each of said plurality of ohmic contacts is connected through a via in said substrate to said conductive region;

Claim 13

The device of claim 9, wherein: (a) said drain contact is connected to said output conductive line by a plurality of drain feeding fingers; (b) said reference terminal is on said upper surface; and (c) said each of said plurality of ohmic contacts is connected to said reference terminal by an air bridge over said input conductive line.

Claim 14

A monolithic amplifier, comprising: (a) a semiconductor substrate having an upper surface and a conductive lower surface; (b) an integrated amplifier circuit disposed along said upper surface, said circuit including i. an input means for receiving a signal to be amplified from a signal source at one end, ii. a plurality of successive amplifying stages including input and output elements for amplifying a signal received, and iii. an output means for providing the amplified signal to a load; iv. each of said amplifying stages including a field effect transistor having a respective source contact, drain contact, and gate on said surface, and an underlying source, drain, and channel below said respective source contact, drain contact, and gate, said gate controlling the conductivity of the respective channel between said source and said drain, said gate being the input element for the stage and connected to said input means, and said drain being the output element for the stage and connected to said output means, said input and output means each including a conductive strip on said upper surface providing input and output transmission lines having connections to said gate and drain of each stage; (c) an input termination impedance between the end of said input transmission line opposite said signal source and said conductive lower surface; (d) an output termination impedance between the end of said output transmission line opposite said load and said conductive bottom surface, said input and output termination impedances providing substantial reflection plus total phase shift approximating the sum of the phase shifts along said input and output transmission lines for waves of frequencies about the upper end of the amplifier's frequency band.

Claim 15

A monolithic amplifier, comprising: (a) a semiconductor substrate having an upper surface and a conductive lower surface; (b) an integrated amplifier circuit disposed along said upper surface, said circuit including i. an input means for receiving a signal to be amplified from a signal source at one end, ii. a plurality of successive amplifying stages including input and output elements for amplifying a signal received, and iii. an output means for providing the amplified signal to a load; iv. each of said amplifying stages including a field effect transistor having a respective source contact, drain contact, and gate on said surface, and an underlying source, drain, and channel below said respective source contact, drain contact, and gate, said gate controlling the conductivity of the respective channel between said source and said drain, said gate being the input element for the stage and connected to said input means, and said drain being the output element for the stage and connected to said output means, said input and output means each including a conductive strip on said upper surface providing input and output transmission lines having connections to said gate and drain of each stage; (c) an input termination impedance between the end of said input transmission line opposite said signal source and said conductive lower surface; (d) an output termination impedance between the end of said output transmission line opposite said load and said conductive bottom surface, said input and output termination impedances providing substantial reflection plus total phase shift approximating the sum of the phase shifts along said input and output transmission lines for waves of frequencies about the upper end of the amplifier's frequency band.

Claim 16

The amplifier of claim 12, wherein: (a) said gates of said stages are formed as a single gate; (b) said drain contacts of said stages are formed as a single drain contact which is integral with said output conductive strip; and (c) each of said source contacts is connected through a via in said substrate to said conductive lower surface.