US4733167A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Measurement circuit for digital to analog converter
Assignee: Verigy Singapore Pte Ltd
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Filing: 1986-02-13
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Granted: 1988-03-22
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Expires: 2006-02-13
Abstract
Abstract A device for evaluating the accuracy and dynamic response of a digital to analog converter (DAC). A digital word generator which provides inputs to the DAC and a sampler which samples the analog output signal from the DAC are triggered by a stream of clock pulses. Clock pulses for the sampler pass through a fixed delay line, to provide time for the DAC to stabilize. Clock pulese for the digital word generator pass through a pulse swallower capable of eliminating clock pulses to phase shift the digital word input to the DAC one step with respect to the sampler trigger signal, to move the sampling point to the next step in the cycle of the digital input waveform.
Inventors
- 👤 Toshio Tamamura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 02:00
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/10; H03M1/1071
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
180 words
Apparatus for measuring characteristics of a digital to analog converter (DAC) by measuring a periodic analog output signal produced by the DAC in response to a sequence of a digital input words while the DAC is operating at a high converting rate, comprising: clock pulse generating means; a digital word generator, triggered by the clock pulses, for providing a periodic sequence of digital input words to the DAC; sampling means, responsive to the clock pulses, for sampling the periodic analog output signal from the DAC at a sampling point having a constant delay time with respect to the triggering time of the digital word generator, to produce sampled analog values; and pulse swallowing means, connected between the clock pulse generating means and the digital word generator, for selectively eliminating clock pulses to shift the sampling point from the analog output corresponding to one digital input word to the analog output corresponding to a different digital input word from the DAC, without altering the delay time of the sampling point with respect to the triggering time of the digital word generator.
Claim 2
Dependent Claim
180 words
Apparatus for measuring characteristics of a digital to analog converter (DAC) by measuring a periodic analog output signal produced by the DAC in response to a sequence of a digital input words while the DAC is operating at a high converting rate, comprising: clock pulse generating means; a digital word generator, triggered by the clock pulses, for providing a periodic sequence of digital input words to the DAC; sampling means, responsive to the clock pulses, for sampling the periodic analog output signal from the DAC at a sampling point having a constant delay time with respect to the triggering time of the digital word generator, to produce sampled analog values; and pulse swallowing means, connected between the clock pulse generating means and the digital word generator, for selectively eliminating clock pulses to shift the sampling point from the analog output corresponding to one digital input word to the analog output corresponding to a different digital input word from the DAC, without altering the delay time of the sampling point with respect to the triggering time of the digital word generator.
Claim 3
Dependent Claim
34 words
The device of claim 1 further comprising: analog to digital converter means connected to the sampling means, for reconverting the sampled analog values to digital values; and memory for storing the reconverted digital values.
Claim 4
Dependent Claim
61 words
The device of claim 1 wherein the digital word generator advances one digital word in the periodic sequence for each clock pulse, and the pulse swallowing means eliminates one clock pulse to shift the sampling point from the analog output corresponding to one digital input word to the analog output corresponding to the next digital input word in the periodic sequence.
Claim 5
Dependent Claim
114 words
The device of claim 1 wherein the sampling means comprises: a sampler triggerred by sampling pulses to sample the amplitude of the analog output signal of the DAC; a frequency divider responsive to the clock pulses generated by the clock pulse generating means to produce a series of timing pulses having the frequency of the periodic sequence of digital input words; a delay circuit responsive to the series of timing pulses to delay the pulses with respect to the clock pulses, by an interval equal to the settling time of the DAC; and a sampling pulse generator responsive to the delayed series of timing pulses, to produce the sampling pulses for triggering the sampler.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-03-22 | 1991-09-21 | 1992-03-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-03-22 | 1995-09-21 | 1996-03-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-03-22 | 1999-09-21 | 2000-03-22 | $7700.00 | Window Closed / Lapsed |