US4733108A
Expired / Lapsed
US
⏱️ 0.0 years remaining
On-chip bias generator
Assignee: XXEROX Corp STAMFORD CT A CORP OF
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Filing: 1982-06-28
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Granted: 1988-03-22
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Expires: 2002-06-28
Abstract
Abstract An improved on-chip bias generator for producing a negative bias for the substrate of a VLSI FET chip for reducing the body effect and for increasing circuit speed. The improvement comprises active FETs to rectify a ring oscillator square wave output, thereby reducing the voltage losses in the rectifier and increasing the amount of voltage delivered to the substrate.
Inventors
- 👤 Ho-Dai Truong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 23:55
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/205
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
132 words
An on-chip bias generator for providing a bias to the substrate of said chip of the type having oscillator means for producing a series of square waves, rectifying means for producing a negative bias voltage from said square waves, and a capacitor for coupling said square waves from said oscillator means to said rectifying means, an improved rectifying means comprising: a first FET for coupling the output side of said capacitor to said substrate, a second FET for coupling the output side of said capacitor to ground, and logic means responsive to the output of said oscillator means for allowing said first FET to conduct only when the square wave is at one level and for allowing said second FET to conduct only when the square wave is at the other level.
Claim 2
Dependent Claim
132 words
An on-chip bias generator for providing a bias to the substrate of said chip of the type having oscillator means for producing a series of square waves, rectifying means for producing a negative bias voltage from said square waves, and a capacitor for coupling said square waves from said oscillator means to said rectifying means, an improved rectifying means comprising: a first FET for coupling the output side of said capacitor to said substrate, a second FET for coupling the output side of said capacitor to ground, and logic means responsive to the output of said oscillator means for allowing said first FET to conduct only when the square wave is at one level and for allowing said second FET to conduct only when the square wave is at the other level.
Claim 3
Dependent Claim
17 words
The generator of claim 1 wherein said oscillator means comprises a ring oscillator and a push-pull buffer.
Claim 4
Dependent Claim
108 words
An on-chip bias generator for providing a bias to the substrate of said chip comprising: oscillator means for producing a series of square waves, a capacitor, one side connected to the output of said oscillator means, a first FET for coupling the other side of said capacitor to said substrate, a second FET for coupling the other side of said capacitor to ground, and logic means responsive to the output of said oscillator means for allowing said first FET to conduct only when the square wave is at one level and for allowing said second FET to conduct only when the square wave is at the other level.
Claim 5
Dependent Claim
108 words
An on-chip bias generator for providing a bias to the substrate of said chip comprising: oscillator means for producing a series of square waves, a capacitor, one side connected to the output of said oscillator means, a first FET for coupling the other side of said capacitor to said substrate, a second FET for coupling the other side of said capacitor to ground, and logic means responsive to the output of said oscillator means for allowing said first FET to conduct only when the square wave is at one level and for allowing said second FET to conduct only when the square wave is at the other level.
Claim 6
Dependent Claim
17 words
The generator of claim 2 wherein said oscillator means comprises a ring oscillator and a push-pull buffer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-03-22 | 1991-09-21 | 1992-03-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-03-22 | 1995-09-21 | 1996-03-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-03-22 | 1999-09-21 | 2000-03-22 | $7700.00 | Window Closed / Lapsed |