Internally fused variable value ceramic capacitor and circuit

Claim 2

An electronic device comprising an intergrated circuit device having power supply input terminals, a multi-layer ceramic capacitor having a plurality of electrode layers and having a first terminal connected to alternate electrode layers of said capacitor, a second terminal connected to the electrode layers of said capacitor intermediate said alternate electrode layers and a third terminal, a fuse member formed internally of said capacitor and electrically interposed between said third terminal and said intermediate electrode layers, first connector means interposed between a power supply terminal of said intergrated circuit device and said first terminal of said capacitor, second connector means interposed between the other power supply terminal of said intergrated circuit device and said second terminal of said capacitor and power supply means having leads of opposite polarity connected respectively to said first and third terminals of said capacitor, whereby charging currents to said I.C. device from said power supply means, flow through said fuse, and said capacitor is connected directly across said power supply input terminals of said intergrated circuit device with no series connection to said fuse.

Claim 3

An internally fused ceramic capacitor having a plurality of opposed surfaces and comprising a plurality of layers of ceramic dielectric material, a first electrode member covering a major portion of each of the surfaces of alternate ones of said layers, each said electrode member having an edge portion extending to a first face of said capacitor, a second electrode member covering a major portion of each of the surfaces of said layers interposed between said alternate layers, said second electrode members being divided into two discrete areas, one said area including a portion extending to a second face of said capacitor and the other said area including a portion extending to a third face of said capacitor, an additional layer of ceramic dielectric material having a conductive pattern formed on a surface thereof, said pattern including a first tab extending to said second face of said capacitor in registry with said portions of said one area of said second electrodes and a second tab extending to said third face in registry with said portions of said other area of said second electrodes, other portions of said pattern extending to a fourth face of said capacitor, first and second reduced cross section areas defining fuses formed on said additional layer, said reduced cross section areas being interposed between said other portions of said pattern and said first and second tabs respectively, a first termination on said first face of said capacitor in electrical connection with said edge portions of said first electrode members, a second termination on said second face of said capacitor electrically connecting at least some of said portions of said second electrode members on said second face and said first tab, a third termination on said third face of said capacitor electrically connecting at least some of said portions of said second electrode on said third face and said second tab, and a fourth termination on said fourth face of said capacitor connected to said other portions of said pattern.

Claim 4

An internally fused ceramic capacitor having a plurality of opposed surfaces and comprising a plurality of layers of ceramic dielectric material, a first electrode member covering a major portion of each of the surfaces of alternate ones of said layers, each said electrode member having an edge portion extending to a first face of said capacitor, a second electrode member covering a major portion of each of the surfaces of said layers interposed between said alternate layers, said second electrode members being divided into two discrete areas, one said area including a portion extending to a second face of said capacitor and the other said area including a portion extending to a third face of said capacitor, an additional layer of ceramic dielectric material having a conductive pattern formed on a surface thereof, said pattern including a first tab extending to said second face of said capacitor in registry with said portions of said one area of said second electrodes and a second tab extending to said third face in registry with said portions of said other area of said second electrodes, other portions of said pattern extending to a fourth face of said capacitor, first and second reduced cross section areas defining fuses formed on said additional layer, said reduced cross section areas being interposed between said other portions of said pattern and said first and second tabs respectively, a first termination on said first face of said capacitor in electrical connection with said edge portions of said first electrode members, a second termination on said second face of said capacitor electrically connecting at least some of said portions of said second electrode members on said second face and said first tab, a third termination on said third face of said capacitor electrically connecting at least some of said portions of said second electrode on said third face and said second tab, and a fourth termination on said fourth face of said capacitor connected to said other portions of said pattern.

Claim 5

A capacitor in accordance with claim 2 wherein said portions of said pattern on said fourth face extend substantially the entirety of the width of said fourth face of said capacitor.