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US4719430A Expired / Lapsed US ⏱️ 0.0 years remaining

Low voltage class B amplifier with low value decoupling capacitors

Assignee: LINEAR TECHNOLOGY Inc
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Filing: 1986-06-25
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Granted: 1988-01-12
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Expires: 2006-06-25
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Abstract

Abstract A class B push-pull integrated circuit suitable for low voltage operation, having two symmetrical halves. Each half circuit has first and second opposite conductivity type transistors having their collectors connected together to the base of a class B driver transistor, the collector of which drives the base of an output transistor. An AC input signal is divided into in-phase and anti-phase components one of which is applied to the base of each first transistor. An AC feedback loop extends from the collector of the fourth transistor through a voltage divider and level shifter to the base of the second transistor. A DC feedback loop extends from the base of the fourth transistor through a fifth transistor to the base of the second transistor. Decoupling capacitors extend from the bases of the fifth transistors and through a diode to ground. The arrangement allows use of small decoupling capacitors, and a current forced through the diode eliminates turn-on delay.

Inventors

  • 👤 William A. Cole

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 06:35
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/26; H03F1/00; H03F1/02; H03F1/0205; H03F1/0261; H03F3/265; H04; H04R; H04R25/00

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 334 words
A class B push-pull integrated circuit amplifier suitable for operation with a low voltage power supply and for amplifying an input signal comprising a first AC input signal and a second AC input signal identical to said first signal but 180 degrees out of phase with respect thereto, said amplifier comprising: (a) two half circuits, each half circuit being the same as the other and each comprising: (i) first and second opposite conductivity type transistors each having an emitter, a base and a collector and having their collectors connected together at a summing node, (ii) a third transistor connected to said summing node for amplification of a signal received by said third transistor from said summing node, (iii) a fourth transistor connected to said third transistor for amplifying a signal received from said third transistor and having an output for producing an output signal, (iv) a DC feedback loop for controlling the idle current of said fourth transistor, said DC feedback loop comprising a fifth transistor connected to said fourth transistor, and means connecting said fifth transistor to the base of said second transistor, (v) an AC feedback loop for controlling the AC gain from said first transistor to said fourth transistor and comprising voltage level shifting means connected between said output of said fourth transistor and said base of said second transistor, (vi) and a decoupling capacitor connected to said fifth transistor, (b) the emitters of said first transistors and said decoupling capacitors being adapted to be connected to one pole of said power supply, (c) the emitters of said second transistors being adapted to be connected to the other pole of said power supply, (d) the base of said first transistor of one said half circuit being adapted to receive said first AC input signal and the base of said first transistor of the other said amplifier half being adapted to receive said second AC inut signal, (e) said outputs of said fourth transistors being adapted to be connected to a load.
Claim 2
Dependent Claim 334 words
A class B push-pull integrated circuit amplifier suitable for operation with a low voltage power supply and for amplifying an input signal comprising a first AC input signal and a second AC input signal identical to said first signal but 180 degrees out of phase with respect thereto, said amplifier comprising: (a) two half circuits, each half circuit being the same as the other and each comprising: (i) first and second opposite conductivity type transistors each having an emitter, a base and a collector and having their collectors connected together at a summing node, (ii) a third transistor connected to said summing node for amplification of a signal received by said third transistor from said summing node, (iii) a fourth transistor connected to said third transistor for amplifying a signal received from said third transistor and having an output for producing an output signal, (iv) a DC feedback loop for controlling the idle current of said fourth transistor, said DC feedback loop comprising a fifth transistor connected to said fourth transistor, and means connecting said fifth transistor to the base of said second transistor, (v) an AC feedback loop for controlling the AC gain from said first transistor to said fourth transistor and comprising voltage level shifting means connected between said output of said fourth transistor and said base of said second transistor, (vi) and a decoupling capacitor connected to said fifth transistor, (b) the emitters of said first transistors and said decoupling capacitors being adapted to be connected to one pole of said power supply, (c) the emitters of said second transistors being adapted to be connected to the other pole of said power supply, (d) the base of said first transistor of one said half circuit being adapted to receive said first AC input signal and the base of said first transistor of the other said amplifier half being adapted to receive said second AC inut signal, (e) said outputs of said fourth transistors being adapted to be connected to a load.
Claim 3
Dependent Claim 102 words
An amplifier according to claim 1 including diode means having first and second terminals, said decoupling capacitors being connected together and to one terminal of said diode means at a second node, the other terminal of said diode means being adapted to be connected to said one pole of said power supply, so that said decoupling capacitors may be connected to said one pole of said power supply through said diode means, and current generating means for generating a current through said diode means to produce a voltage drop thereacross for reducing charging of said decoupling capacitors in operation of said amplifier.
Claim 4
Dependent Claim 29 words
An amplifier according to claim 1 including in each half circuit current generating means connected to said third transistor for producing a controlled idle current through said third transistor.
Claim 5
Dependent Claim 28 words
A circuit according to claim 1 wherein in each half circuit said level shifting means comprises a sixth transistor of the same conductivity type as said second transistor.
Claim 6
Dependent Claim 75 words
A circuit according to claim 4 including compensation means in each half circuit for controlling the gain and phase shift of said first and second AC input signals in said amplifier to limit instability of said amplifier, said compensation means comprising a first compensation network coupled between said third and fourth transistors, a second compensation network coupled between said fourth and sixth transistors, and a third compensation network coupled between said second and sixth transistors.
Claim 7
Dependent Claim 30 words
An amplifier according to claim 1 wherein said first, fourth and fifth transistors are of one conductivity type and said second and third transistors are of the opposite conductivity type.
Claim 8
Dependent Claim 414 words
A class B push-pull integrated circuit amplifier suitable for operation with a low voltage power supply and comprising: (a) generating means for accepting an external AC input signal and for generating therefrom a first AC input signal proportional to said external signal and a second AC input signal identical to said first AC inut signal but 180 degrees out of phase with respect thereto, (b) means for generating a DC bias signal, (c) two half circuits, each half circuit being the same as the other and each comprising: (i) first, second, third, fourth and fifth transistors, each having an emitter, base collector, (ii) said first and second transistors being of opposite conductivity type and having their collectors connected together at a summing node, (iii) a third transistor having its base connected to said summing node for amplification of a signal received by said third transistor from said summing node, (iv) a fourth transistor having its base connected to the collector of said third transistor for amplifying a signal received from said third transistor and for producing an output signal at the collector of said fourth transistor, (v) a DC feedback loop for controlling the idle current of said fourth transistor and comprising a fifth transistor having its base connected to the base of said fourth transistor, and means connecting the collector of said fifth transistor to the base of said second transistor, (vi) an AC feedback loop for controlling the AC gain from said first transistor to said fourth transistor and comprising voltage level shifting means connected between the collector of said fourth transistor and the base of said second transistor, (vii) and a decoupling capacitor connected to the base of said fifth transistor, (d) the emitters of said first transistors and said decoupling capacitors being adapted to be connected to one pole of said power supply, (e) the emitters of said second transistors being adapted to be connected to the other pole of said power supply, (f) means connecting said generating means to the base of said first transistor of one half circuit for applying said first AC input signal and said DC bias signal to said first transistor thereof, and means connecting said generating means to the base of said first transistor of the other half circuit for applying said second AC signal and said DC bias signal to said first transistor of said other half circuit, (g) the outputs of said fourth transistors being adapted to be connected to a load.
Claim 9
Dependent Claim 414 words
A class B push-pull integrated circuit amplifier suitable for operation with a low voltage power supply and comprising: (a) generating means for accepting an external AC input signal and for generating therefrom a first AC input signal proportional to said external signal and a second AC input signal identical to said first AC inut signal but 180 degrees out of phase with respect thereto, (b) means for generating a DC bias signal, (c) two half circuits, each half circuit being the same as the other and each comprising: (i) first, second, third, fourth and fifth transistors, each having an emitter, base collector, (ii) said first and second transistors being of opposite conductivity type and having their collectors connected together at a summing node, (iii) a third transistor having its base connected to said summing node for amplification of a signal received by said third transistor from said summing node, (iv) a fourth transistor having its base connected to the collector of said third transistor for amplifying a signal received from said third transistor and for producing an output signal at the collector of said fourth transistor, (v) a DC feedback loop for controlling the idle current of said fourth transistor and comprising a fifth transistor having its base connected to the base of said fourth transistor, and means connecting the collector of said fifth transistor to the base of said second transistor, (vi) an AC feedback loop for controlling the AC gain from said first transistor to said fourth transistor and comprising voltage level shifting means connected between the collector of said fourth transistor and the base of said second transistor, (vii) and a decoupling capacitor connected to the base of said fifth transistor, (d) the emitters of said first transistors and said decoupling capacitors being adapted to be connected to one pole of said power supply, (e) the emitters of said second transistors being adapted to be connected to the other pole of said power supply, (f) means connecting said generating means to the base of said first transistor of one half circuit for applying said first AC input signal and said DC bias signal to said first transistor thereof, and means connecting said generating means to the base of said first transistor of the other half circuit for applying said second AC signal and said DC bias signal to said first transistor of said other half circuit, (g) the outputs of said fourth transistors being adapted to be connected to a load.
Claim 10
Dependent Claim 103 words
An amplifier according to claim 7 and including diode means having first and second terminals, said decoupling capacitors being connected together and to one terminal of said diode means at a second node, the other terminal of said diode means being adapted to be connected to said one pole of said power supply, so that said decoupling capacitors may be connected to said one pole of said power supply through said diode means, and current generating means for generating a current through said diode means to produce a voltage crop thereacross for reducing charging of said decoupling capacitors in operation of said amplifier.
Claim 11
Dependent Claim 33 words
An amplifier according to claim 8 and including in each half circuit current generating means connected to the collector of each third transistor for producing a controlled idle current through each third transistor.
Claim 12
Dependent Claim 48 words
An amplifier according to claim 9 wherein in each half circuit said AC feedback loop comprises a resistive voltage divider connected to the collector of said fourth transistor, said level shifting means comprising a sixth transistor connected between said voltage divider and the base of said second transistor.
Claim 13
Dependent Claim 31 words
An amplifier according to claim 10 wherein said first, fourth and fifth transistors are of one conductivity type and said second, third and sixth transistors are of the opposite conductivity type.
Claim 14
Dependent Claim 20 words
An amplifier according to claim 11 wherein said one conductivity type is NPN and said opposite conductivity type is PNP.
Claim 15
Dependent Claim 31 words
An amplifier according to claim 7 and including in each half circuit current source means connected to the collector of said third transistor for supplying and setting the collector current thereof.

References Cited (Backward Citations)

US4476442A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-01-11 1991-07-13 1992-01-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-01-11 1995-07-13 1996-01-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-01-11 1999-07-13 2000-01-12 $7700.00 Window Closed / Lapsed

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