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US4715037A Expired / Lapsed US ⏱️ 0.0 years remaining

Viterbi decoder comprising a majority circuit in producing a decoded signal

Assignee: NEC Corp
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Filing: 1985-02-25
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Granted: 1987-12-22
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Expires: 2005-02-25
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Abstract

Abstract In a Viterbi decoder for use in producing a decoded signal by correcting and decoding convolutional codes, a majority circuit (46) is connected to a path memory (45). At each of the time slots used for the respective convolutional codes, the majority circuit makes a decision and selects a decoded datum of the decoded signal in response to a majority of information bits which are memorized in the path memory. The Viterbi decoder consists of a read-only memory, which simplifies the circuit, reduces the required number of circuit elements, and makes a lower cost circuit.

Inventors

  • 👤 Toshiharu Yagi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:34
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/37; H03M13/39; H03M13/41

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 139 words
A Viterbi decoder for use in producing a decoded signal by correcting and decoding convolutional codes in synchronism with a succession of time slots, said Viterbi decoder including a path memory for memorizing, at each of said time slots, survivor paths in terms of information bits associated with the respective survivor paths of a predetermined number of time slots, and a majority circuit consisting of a read-only memory for deciding a decoded datum of said decoded signal for each of the time slots to provide a predetermined one of said information bits 0 and 1 in response to a majority of said information bits and to provide a predetermined one of said information bits 0 and 1 in response to a tie situation where the number of said information bits 0 equals the number of said information bits "1".
Claim 2
Dependent Claim 139 words
A Viterbi decoder for use in producing a decoded signal by correcting and decoding convolutional codes in synchronism with a succession of time slots, said Viterbi decoder including a path memory for memorizing, at each of said time slots, survivor paths in terms of information bits associated with the respective survivor paths of a predetermined number of time slots, and a majority circuit consisting of a read-only memory for deciding a decoded datum of said decoded signal for each of the time slots to provide a predetermined one of said information bits 0 and 1 in response to a majority of said information bits and to provide a predetermined one of said information bits 0 and 1 in response to a tie situation where the number of said information bits 0 equals the number of said information bits "1".
Claim 3
Dependent Claim 31 words
A Viterbi decoder as claimed in claim 1, wherein said predetermined number of the time slots is equal to at least six times a predetermined code length of said convolutional codes.

References Cited (Backward Citations)

US3662338A Cited
US3831142A Cited
US3789360A Cited
US3873971A Cited
US3872432A Cited
US4240156A Cited
US4536878A Cited
US4500994A Cited
US4545054A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-12-21 1991-06-22 1991-12-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-12-21 1995-06-22 1995-12-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-12-21 1999-06-22 1999-12-22 $7700.00 Window Closed / Lapsed

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