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US4714895A Expired / Lapsed US ⏱️ 0.0 years remaining

Internal all-differential operational amplifier for CMOS integrated circuits

Assignee: STMicroelectronics SRL
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Filing: 1986-10-14
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Granted: 1987-12-22
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Expires: 2006-10-14
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Abstract

Abstract The amplifier comprises two like CMOS cascode circuits, each having a first and a second transistors with channels having a first plurality and a third and fourth transistors with channels having the opposite polarity, the drain of the first transistor being connected to the source of the second transistor, and the drain of the fourth transistor being connected to the source of the third transistor, the drains of the second and of the third transistors being connected to each other end composing one of the output terminals of the amplifier, the sources of the first transistors being connected to each other and to the drain of a fifth transistor with a channel having the first polarity, the source of which is fed by a first supply voltage, the sources of the fourth transistors of the two cascode circuits being fed by a second supply voltage.

Inventors

  • 👤 Germano Nicollini
  • 👤 Daniel Senderowicz

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 09:47
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45179; H03F3/45183; H03F3/45188; H03F3/45192; H03F3/45479; H03F3/45632; H03F3/45636; H03F3/45641; H03F3/4565; H03F3/45654; H03F3/45928; H03F3/45968; H03F3/45982; H03F3/45986; H03F2203/00; H03F2203/45; H03F2203/45012; H03F2203/45028; H03F2203/45082; H03F2203/45184; H03F2203/45421; H03F2203/45466; H03F2203/45651

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 225 words
An internal all-differential operational amplifier for integrated circuits of the CMOS type, comprising two CMOS cascode circuits, identical to each other, each having a first and a second transistors with a channel having a first polarity and a third and fourth transistors with a channel having the opposite polarity, the drain of the first transistor being connected to the source of the second transistor, the drain of the fourth transistor being connected to the source of the third transistor, the drains of the second and of the third transistor being connected to each other and forming one of the output terminals of said amplifier, the sources of the first transistors of the two cascode circuits being both connected to the drain of a fifth transistor having said first polarity, the source of which is fed by a first supply voltage, and the sources of the fourth transistors of the two cascode circuits being fed by a second supply voltage, the two input signals being applied, by means of capacitor and switching means simulating input resistors, to the respective gates of said two first transistors, the other three gates of each cascode circuit being biased by respective fixed biasing voltages, the gate of the fifth transistor being biased by a dedicated fixed biasing voltage by means of capacitor and switching means constituting a common-mode feedback circuit.
Claim 2
Dependent Claim 225 words
An internal all-differential operational amplifier for integrated circuits of the CMOS type, comprising two CMOS cascode circuits, identical to each other, each having a first and a second transistors with a channel having a first polarity and a third and fourth transistors with a channel having the opposite polarity, the drain of the first transistor being connected to the source of the second transistor, the drain of the fourth transistor being connected to the source of the third transistor, the drains of the second and of the third transistor being connected to each other and forming one of the output terminals of said amplifier, the sources of the first transistors of the two cascode circuits being both connected to the drain of a fifth transistor having said first polarity, the source of which is fed by a first supply voltage, and the sources of the fourth transistors of the two cascode circuits being fed by a second supply voltage, the two input signals being applied, by means of capacitor and switching means simulating input resistors, to the respective gates of said two first transistors, the other three gates of each cascode circuit being biased by respective fixed biasing voltages, the gate of the fifth transistor being biased by a dedicated fixed biasing voltage by means of capacitor and switching means constituting a common-mode feedback circuit.
Claim 3
Dependent Claim 49 words
An all-differential operational amplifier according to claim 1, wherein the biasing voltage of the gates of the first transistors of said two cascode circuits is above said first supply voltage by a value which is equal to the gate-source voltage plus the value of the minimum saturation drain voltage.
Claim 4
Dependent Claim 49 words
An all-differential operational amplifier according to claim 2, wherein the biasing voltage of the gates of said third transistors of said two cascode circuits is below said second supply voltage by a value which is equal to the gate-source voltage plus the value of the minimum saturation drain voltage.
Claim 5
Dependent Claim 38 words
An all-differential operational amplifier according to claim 3, wherein the biasing voltage of the gates of said fourth transistors of said two cascode circuits is below said second supply voltage by a value equal to the gate-source voltage.
Claim 6
Dependent Claim 41 words
An all-differential operational amplifier according to claim 1, wherein the biasing voltage which drives the gate of said fifth transistor through the common-mode feedback circuit is above said first supply voltage by a value which is equal to the gate-source voltage.
Claim 7
Dependent Claim 79 words
An all-differential operational amplifier according to claim 5, wherein said common-mode feedback circuit comprises two fixed capacitors, each having one end connected to the gate of said fifth transistor and the opposite end respectively connected to one of the output terminals of the differential amplifier, and two further switched capacitors having the ends connected to respective controllable double switches to alternately place said further capacitors parallel-coupled with said fixed capacitors and connected between the ground and a biasing voltage.

References Cited (Backward Citations)

US4656437A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-12-21 1991-06-22 1991-12-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-12-21 1995-06-22 1995-12-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-12-21 1999-06-22 1999-12-22 $7700.00 Window Closed / Lapsed

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