Vehicle power window control circuit with reverse battery protection

Claim 2

A power window control circuit for a motcr vehicle comprising, in combination: an electric power supply having first and second terminals with a first predetermined voltage therebetween; an electric motor having an armature with first and second armature terminals; a FET having drain and source connected between the first armature terminal of the electric motor and the first terminal of the electric power supply, the FET further having a gate and an internal anti-parallel diode; a first switch connecting the first armature terminal of the electric motor to the second terminal of the electric power supply, the first switch being normally open; a second switch having first and second states connecting the second armature terminal of the electric motor to the first and second terminals, respectively, of the electric power supply, the second switch being normally in its second state; a capacitor connected across the drain and source of the FET; unidirectional current means in series with the capacitor and effective to allow the capacitor to be charged by the electrical power supply but prevent the capacitor from discharging through the FET; a third switch connecting the gate of the FET to the second terminal of the electric power supply; resistance means connecting the side of the capacitor adjacent the first terminal of the electric power supply to the gate of the FET; first control means activatable to change the second switch to its first state and close the first switch, whereby the motor is activated to run in a first window moving direction, and deactivatable to return the second switch to its second state and open the first switch, whereby the motor stops running and the inductive energy of the motor armature is dissipated through the internal anti-parallel diode of the FET; second control means activatable to open the third switch and thus allow the FET to conduct, whereby the motor is activated to run in a second window moving direction, and deactivatable to close the third switch, whereby the FET stops conducting and the motor stops running; a zener diode connected to limit the voltage from gate to drain of the FET to a second predetermined voltage greater than the first but less than that which will harm the FET, whereby the increase in voltage across the FET caused by the inductive energy in the armature windings of the motor upon deactivation of the second control means causes the FET to conduct as necessary to dissipate said inductive energy without harm to the FET.

Claim 3

The power window control circuit of claim 1 in which the first switch is an SCR having no anti-parallel diode.

Claim 4

A power window control circuit for a motor vehicle comprising, in combination: an electric power supply having power and ground terminals with a power supply voltage therebetween; an electric motor having an armature with first and second armature terminals; a FET having a drain connected to the power terminal and a source connected to the first armature terminal, the FET further having a gate and an internal anti-parallel diode; an SCR connecting the first armature terminal to the ground terminal of the electric power supply; a switch having first and second states connecting the second armature terminal to the power and ground terminals, respectively, the switch being normally in its second state; a first diode having an anode connected to the FET drain and a cathode; a capacitor connected from the cathode of the first diode to the FET source; first and second resistors in series connected between the cathode of the first diode and the FET gate; a transistor having a control electrode and further having an internal controlled current path connecting the junction of the first and second resistors to the ground terminal; a first zener diode having a cathode connected to the cathode of the first diode and an anode connected to the FET gate, the first zener diode having a zener voltage greater than the power supply voltage but less, by at least the FET threshold voltage, than the maximum allowable FET source to drain voltage; a second zener diode having a cathode connected to the FET gate, an anode connected to the FET source and a zener voltage less than the maximum allowable FET source to gate voltage; first control means activatable to activate the SCR and change the switch to its first state, whereby the motor is activated to run in a first window moving direction, and deactivatable to return the switch to its second state, whereby the motor stops running, the SCR deactivates and the inductive energy of the motor armature is dissipated through the internal anti-parallel diode of the FET; and second control means connected to the transistor control electrode to cause conduction through the transistor and thus ground the FET gate, the second control means being activatable to end conduction through the transistor and thus allow the capacitor to activate the FET to conduct, whereby the motor is activated to run in a second window moving direction, and deactivatable to resume conduction through the transistor, whereby the FET stops conducting, the motor stops running, and the inductive energy of the motor armature is dissipated by the FET conducting due to the high voltage generated thereby across the FET and the first zener diode.

Claim 5

A power window control circuit for a motor vehicle comprising, in combination: an electric power supply having power and ground terminals with a power supply voltage therebetween; an electric motor having an armature with first and second armature terminals; a FET having a drain connected to the power terminal and a source connected to the first armature terminal, the FET further having a gate and an internal anti-parallel diode; an SCR connecting the first armature terminal to the ground terminal of the electric power supply; a switch having first and second states connecting the second armature terminal to the power and ground terminals, respectively, the switch being normally in its second state; a first diode having an anode connected to the FET drain and a cathode; a capacitor connected from the cathode of the first diode to the FET source; first and second resistors in series connected between the cathode of the first diode and the FET gate; a transistor having a control electrode and further having an internal controlled current path connecting the junction of the first and second resistors to the ground terminal; a first zener diode having a cathode connected to the cathode of the first diode and an anode connected to the FET gate, the first zener diode having a zener voltage greater than the power supply voltage but less, by at least the FET threshold voltage, than the maximum allowable FET source to drain voltage; a second zener diode having a cathode connected to the FET gate, an anode connected to the FET source and a zener voltage less than the maximum allowable FET source to gate voltage; first control means activatable to activate the SCR and change the switch to its first state, whereby the motor is activated to run in a first window moving direction, and deactivatable to return the switch to its second state, whereby the motor stops running, the SCR deactivates and the inductive energy of the motor armature is dissipated through the internal anti-parallel diode of the FET; and second control means connected to the transistor control electrode to cause conduction through the transistor and thus ground the FET gate, the second control means being activatable to end conduction through the transistor and thus allow the capacitor to activate the FET to conduct, whereby the motor is activated to run in a second window moving direction, and deactivatable to resume conduction through the transistor, whereby the FET stops conducting, the motor stops running, and the inductive energy of the motor armature is dissipated by the FET conducting due to the high voltage generated thereby across the FET and the first zener diode.